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Merge branch 'feature/s31_lp_i2c' into 'master'

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feat(ulp): support I2C on ULP for S31

Closes IDF-14635

See merge request espressif/esp-idf!48405
This commit is contained in:
Marius Vikhammer
2026-05-13 08:31:29 +08:00
parent 485ab9aa29 ab9cf37a1b
commit 73dc40eb8a
7 changed files with 34 additions and 18 deletions
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components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
+4
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@@ -1219,6 +1219,10 @@ config SOC_LP_CORE_CONFIGURABLE_BOOT_ADDR
bool
default y
config SOC_LP_CORE_SUPPORT_I2C
bool
default y
config SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE
bool
default y
components/soc/esp32s31/include/soc/soc_caps.h
+1 -1
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@@ -483,7 +483,7 @@
#define SOC_LP_MAILBOX_SUPPORTED (1) /*!< LP Core supports LP-mailbox */
#define SOC_LP_CORE_SUPPORT_ETM (1) /*!< LP Core supports ETM wakeup */
#define SOC_LP_CORE_CONFIGURABLE_BOOT_ADDR (1) /*!< LP Core has no LP ROM; HP must write the reset_vector address (LP_RAM_BASE+0x80) to LP_SYS.lp_core_boot_addr before triggering LP wake */
//#define SOC_LP_CORE_SUPPORT_I2C (1) /*!< LP Core supports I2C */ TODO IDF-14635
#define SOC_LP_CORE_SUPPORT_I2C (1) /*!< LP Core supports I2C */
#define SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE (1) /*!< LP core requests sleep, PMU clears both HP and LP wakeup causes */
#define SOC_LP_CORE_HAS_PMP (1) /*!< LP Core RISC-V has 16 PMP entries (128-byte granularity, RISC-V v1.10) */