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Merge branch 's31_uart_support' into 'master'

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feat(uart): support  uart on ESP32S31

Closes IDF-14789, IDF-14790, and IDF-14792

See merge request espressif/esp-idf!46813
This commit is contained in:
Gao Xu
2026-04-17 16:37:55 +08:00
parent 478e0861d8 0068fb1507
commit 72c77c6e33
24 changed files with 1374 additions and 125 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
+25 -1
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@@ -761,12 +761,16 @@ config SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX
config SOC_UART_NUM
int
default 4
default 5
config SOC_UART_HP_NUM
int
default 4
config SOC_UART_LP_NUM
int
default 1
config SOC_UART_FIFO_LEN
int
default 128
@@ -791,6 +795,14 @@ config SOC_UART_SUPPORT_WAKEUP_INT
bool
default y
config SOC_UART_HAS_LP_UART
bool
default y
config SOC_UART_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
int
default 5
@@ -799,6 +811,18 @@ config SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE
bool
default y
config SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE
bool
default y
config SOC_UART_WAKEUP_SUPPORT_START_BIT_MODE
bool
default y
config SOC_UART_WAKEUP_SUPPORT_CHAR_SEQ_MODE
bool
default y
config SOC_MODEM_CLOCK_IS_INDEPENDENT
bool
default y
components/soc/esp32s31/include/soc/clk_tree_defs.h
+15 -1
View File
@@ -238,9 +238,23 @@ typedef enum {
UART_SCLK_PLL_F80M = SOC_MOD_CLK_PLL_F80M, /*!< UART source clock is PLL_F80M */
UART_SCLK_RTC = SOC_MOD_CLK_RC_FAST, /*!< UART source clock is RC_FAST */
UART_SCLK_XTAL = SOC_MOD_CLK_XTAL, /*!< UART source clock is XTAL */
UART_SCLK_DEFAULT = SOC_MOD_CLK_XTAL, /*!< UART source clock default choice is XTAL in fpga env */
UART_SCLK_DEFAULT = SOC_MOD_CLK_PLL_F80M, /*!< UART source clock default choice is PLL_F80M */
} soc_periph_uart_clk_src_legacy_t;
/**
* @brief Array initializer for all supported clock sources of LP_UART
*/
#define SOC_LP_UART_CLKS {SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_XTAL}
/**
* @brief Type of LP_UART clock source
*/
typedef enum {
LP_UART_SCLK_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< LP_UART source clock is FOSC */
LP_UART_SCLK_XTAL = SOC_MOD_CLK_XTAL, /*!< LP_UART source clock is XTAL */
LP_UART_SCLK_DEFAULT = SOC_MOD_CLK_RC_FAST, /*!< LP_UART source clock default choice is FOSC */
} soc_periph_lp_uart_clk_src_t;
//////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////
/**
components/soc/esp32s31/include/soc/soc_caps.h
+8 -5
View File
@@ -26,7 +26,7 @@
// #define SOC_ADC_SUPPORTED 1 // TODO: [ESP32S31] IDF-14741
// #define SOC_ANA_CMPR_SUPPORTED 1 // TODO: [ESP32S31] IDF-14787
#define SOC_DEDICATED_GPIO_SUPPORTED 1
#define SOC_UART_SUPPORTED 1 // TODO: [ESP32S31] IDF-14789
#define SOC_UART_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1
// #define SOC_UHCI_SUPPORTED 1 // TODO: [ESP32S31] IDF-14791
#define SOC_AHB_GDMA_SUPPORTED 1
@@ -353,20 +353,23 @@
#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX (64)
/*-------------------------- UART CAPS ---------------------------------------*/
// TODO: [ESP32S31] IDF-14789
#define SOC_UART_NUM (4)
#define SOC_UART_NUM (5)
#define SOC_UART_HP_NUM (4)
#define SOC_UART_LP_NUM (1U)
#define SOC_UART_FIFO_LEN (128) /*!< The UART hardware FIFO length */
#define SOC_LP_UART_FIFO_LEN (16) /*!< The LP UART hardware FIFO length */
#define SOC_UART_BITRATE_MAX (5000000) /*!< Max bit rate supported by UART */
#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */
#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
// #define SOC_UART_HAS_LP_UART (1) /*!< Support LP UART */
// #define SOC_UART_SUPPORT_SLEEP_RETENTION (1) /*!< Support back up registers before sleep */
#define SOC_UART_HAS_LP_UART (1) /*!< Support LP UART */
#define SOC_UART_SUPPORT_SLEEP_RETENTION (1) /*!< Support back up registers before sleep */
#define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
#define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
#define SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE (1)
#define SOC_UART_WAKEUP_SUPPORT_START_BIT_MODE (1)
#define SOC_UART_WAKEUP_SUPPORT_CHAR_SEQ_MODE (1)
// /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
#define SOC_MODEM_CLOCK_IS_INDEPENDENT (1)
components/soc/esp32s31/include/soc/uart_pins.h
+16 -14
View File
@@ -6,35 +6,34 @@
#pragma once
// TODO: to be checked IDF-14789
/* Specify the GPIO pin number for each UART signal in the IOMUX */
#define U0RXD_GPIO_NUM 59
#define U0TXD_GPIO_NUM 58
#define U0RTS_GPIO_NUM (-1)
#define U0CTS_GPIO_NUM (-1)
// DTR
// DSR
#define U0DTR_GPIO_NUM (-1)
#define U0DSR_GPIO_NUM (-1)
#define U1RXD_GPIO_NUM (-1)
#define U1TXD_GPIO_NUM (-1)
#define U1RTS_GPIO_NUM (-1)
#define U1CTS_GPIO_NUM (-1)
#define U1DTR_GPIO_NUM (-1)
#define U1DSR_GPIO_NUM (-1)
#define U2RXD_GPIO_NUM (-1)
#define U2TXD_GPIO_NUM (-1)
#define U2RTS_GPIO_NUM (-1)
#define U2CTS_GPIO_NUM (-1)
#define U2DTR_GPIO_NUM (-1)
#define U2DSR_GPIO_NUM (-1)
#define U3RXD_GPIO_NUM (-1)
#define U3TXD_GPIO_NUM (-1)
#define U3RTS_GPIO_NUM (-1)
#define U3CTS_GPIO_NUM (-1)
#define U4RXD_GPIO_NUM (-1)
#define U4TXD_GPIO_NUM (-1)
#define U4RTS_GPIO_NUM (-1)
#define U4CTS_GPIO_NUM (-1)
#define U3DTR_GPIO_NUM (-1)
#define U3DSR_GPIO_NUM (-1)
#define LP_U0RXD_GPIO_NUM 7
#define LP_U0TXD_GPIO_NUM 6
@@ -49,26 +48,29 @@
#define U0RXD_MUX_FUNC (0)
#define U0RTS_MUX_FUNC (-1)
#define U0CTS_MUX_FUNC (-1)
#define U0DTR_MUX_FUNC (-1)
#define U0DSR_MUX_FUNC (-1)
#define U1TXD_MUX_FUNC (-1)
#define U1RXD_MUX_FUNC (-1)
#define U1RTS_MUX_FUNC (-1)
#define U1CTS_MUX_FUNC (-1)
#define U1DTR_MUX_FUNC (-1)
#define U1DSR_MUX_FUNC (-1)
#define U2TXD_MUX_FUNC (-1)
#define U2RXD_MUX_FUNC (-1)
#define U2RTS_MUX_FUNC (-1)
#define U2CTS_MUX_FUNC (-1)
#define U2DTR_MUX_FUNC (-1)
#define U2DSR_MUX_FUNC (-1)
#define U3TXD_MUX_FUNC (-1)
#define U3RXD_MUX_FUNC (-1)
#define U3RTS_MUX_FUNC (-1)
#define U3CTS_MUX_FUNC (-1)
#define U4TXD_MUX_FUNC (-1)
#define U4RXD_MUX_FUNC (-1)
#define U4RTS_MUX_FUNC (-1)
#define U4CTS_MUX_FUNC (-1)
#define U3DTR_MUX_FUNC (-1)
#define U3DSR_MUX_FUNC (-1)
#define LP_U0TXD_MUX_FUNC (0)
#define LP_U0RXD_MUX_FUNC (0)
components/soc/esp32s31/register/soc/uart_struct.h
-1
View File
@@ -1346,7 +1346,6 @@ extern uart_dev_t UART0;
extern uart_dev_t UART1;
extern uart_dev_t UART2;
extern uart_dev_t UART3;
extern uart_dev_t UART4;
extern uart_dev_t LP_UART;
#ifndef __cplusplus