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refactor(apll): move the apll soc caps to clk_tree_ll
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@@ -77,8 +77,7 @@ static esp_err_t i2s_std_set_clock(i2s_chan_handle_t handle, const i2s_std_clk_c
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portENTER_CRITICAL(&g_i2s.spinlock);
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/* Set clock configurations in HAL*/
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I2S_RCC_ATOMIC() {
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I2S_RCC_ENV_DECLARE;
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I2S_CLOCK_SRC_ATOMIC() {
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if (handle->dir == I2S_DIR_TX) {
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i2s_hal_set_tx_clock(&handle->controller->hal, &clk_info, clk_cfg->clk_src);
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} else {
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