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fix(esp_system): support rom secure boot fast wake feature for esp32s31

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wuzhenghui
2026-07-28 21:46:24 +08:00
parent cadfa9c096
commit 708f34bd16
5 changed files with 59 additions and 3 deletions
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components/heap/port/esp32s31/memory_layout.c
+13 -1
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@@ -9,6 +9,7 @@
#include "esp_attr.h"
#include "sdkconfig.h"
#include "soc/soc.h"
#include "esp_rom_caps.h"
#include "heap_memory_layout.h"
#include "esp_heap_caps.h"
@@ -67,6 +68,17 @@ const size_t soc_memory_type_count = sizeof(soc_memory_types) / sizeof(soc_memor
*/
#define APP_USABLE_DRAM_END (SOC_ROM_STACK_START - SOC_ROM_STACK_SIZE)
#if CONFIG_SECURE_BOOT && ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP
#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
#define ESP_SECURE_BOOT_DIGEST_LEN 48
#else /* !CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */
#define ESP_SECURE_BOOT_DIGEST_LEN 32
#endif /* CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */
#define APP_USABLE_RTC_MEM_END (SOC_LP_RAM_HIGH - ESP_SECURE_BOOT_DIGEST_LEN)
#else
#define APP_USABLE_RTC_MEM_END (SOC_LP_RAM_HIGH)
#endif
const soc_memory_region_t soc_memory_regions[] = {
#ifdef CONFIG_SPIRAM
@@ -75,7 +87,7 @@ const soc_memory_region_t soc_memory_regions[] = {
{ SOC_DIRAM_DRAM_LOW, (APP_USABLE_DRAM_END - SOC_DIRAM_DRAM_LOW), SOC_MEMORY_TYPE_RAM, SOC_DIRAM_IRAM_LOW, false}, //D/IRAM, can be used as trace memory
{ APP_USABLE_DRAM_END, (SOC_DIRAM_DRAM_HIGH - APP_USABLE_DRAM_END), SOC_MEMORY_TYPE_RAM, APP_USABLE_DRAM_END, true}, //D/IRAM, can be used as trace memory (ROM reserved area)
#ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
{ SOC_LP_RAM_LOW, (SOC_LP_RAM_HIGH - SOC_LP_RAM_LOW), SOC_MEMORY_TYPE_RTCRAM, 0, false}, //LPRAM
{ SOC_LP_RAM_LOW, (APP_USABLE_RTC_MEM_END - SOC_LP_RAM_LOW), SOC_MEMORY_TYPE_RTCRAM, 0, false}, //LPRAM
#endif
};