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feat(uart): support uart module sleep retention on c6/h2
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@@ -45,6 +45,8 @@ typedef enum sleep_retention_module {
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SLEEP_RETENTION_MODULE_GDMA_CH0 = 24,
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SLEEP_RETENTION_MODULE_GDMA_CH1 = 25,
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SLEEP_RETENTION_MODULE_GDMA_CH2 = 26,
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SLEEP_RETENTION_MODULE_UART0 = 27,
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SLEEP_RETENTION_MODULE_UART1 = 28,
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SLEEP_RETENTION_MODULE_MAX = 31
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} sleep_retention_module_t;
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@@ -71,9 +73,23 @@ typedef enum sleep_retention_module_bitmap {
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SLEEP_RETENTION_MODULE_BM_GDMA_CH1 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH1),
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SLEEP_RETENTION_MODULE_BM_GDMA_CH2 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH2),
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SLEEP_RETENTION_MODULE_BM_UART0 = BIT(SLEEP_RETENTION_MODULE_UART0),
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SLEEP_RETENTION_MODULE_BM_UART1 = BIT(SLEEP_RETENTION_MODULE_UART1),
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SLEEP_RETENTION_MODULE_BM_ALL = (uint32_t)-1
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} sleep_retention_module_bitmap_t;
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#define TOP_DOMAIN_PERIPHERALS_BM (SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM \
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| SLEEP_RETENTION_MODULE_BM_CLOCK_MODEM \
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| SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
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| SLEEP_RETENTION_MODULE_BM_GDMA_CH0 \
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| SLEEP_RETENTION_MODULE_BM_GDMA_CH1 \
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| SLEEP_RETENTION_MODULE_BM_GDMA_CH2 \
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| SLEEP_RETENTION_MODULE_BM_ADC \
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| SLEEP_RETENTION_MODULE_BM_UART0 \
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| SLEEP_RETENTION_MODULE_BM_UART1 \
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)
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typedef regdma_entry_buf_t sleep_retention_entries_t;
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typedef struct {
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