diff --git a/components/esp_driver_spi/include/esp_private/spi_common_internal.h b/components/esp_driver_spi/include/esp_private/spi_common_internal.h index e604254ed8e..83ffb43de82 100644 --- a/components/esp_driver_spi/include/esp_private/spi_common_internal.h +++ b/components/esp_driver_spi/include/esp_private/spi_common_internal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2010-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -9,16 +9,14 @@ #pragma once #include +#include "esp_pm.h" #include "driver/spi_common.h" #include "hal/spi_types.h" #include "hal/dma_types.h" #include "soc/ext_mem_defs.h" //for SOC_NON_CACHEABLE_OFFSET #include "esp_private/spi_dma.h" -#include "esp_pm.h" -#include "esp_private/spi_share_hw_ctrl.h" -#if SOC_GDMA_SUPPORTED #include "esp_private/gdma.h" -#endif +#include "esp_private/spi_share_hw_ctrl.h" #ifdef __cplusplus extern "C" diff --git a/components/esp_driver_spi/src/gpspi/spi_master.c b/components/esp_driver_spi/src/gpspi/spi_master.c index d034c909672..b9e655ff292 100644 --- a/components/esp_driver_spi/src/gpspi/spi_master.c +++ b/components/esp_driver_spi/src/gpspi/spi_master.c @@ -337,7 +337,7 @@ static esp_err_t spi_master_init_driver(spi_host_device_t host_id) } spi_hal_init(&host->hal, host_id); - spi_hal_config_io_default_level(&host->hal, bus_attr->bus_cfg.data_io_default_level); + spi_hal_set_data_pin_idle_level(&host->hal, bus_attr->bus_cfg.data_io_default_level); if (host_id != SPI1_HOST) { //SPI1 attributes are already initialized at start up. diff --git a/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h index 4b6218ab0e6..9304a96c42b 100644 --- a/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -246,13 +246,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h index 354619793f2..ff45716121d 100644 --- a/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -251,13 +251,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h index 240fc013660..51c43be5f45 100644 --- a/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -900,13 +900,16 @@ static inline void spi_ll_master_set_cs_setup(spi_dev_t *hw, uint8_t setup) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /*------------------------------------------------------------------------------ diff --git a/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h index 522f82f8bca..9abd1590bc0 100644 --- a/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -236,13 +236,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h index 8e8a4a5665c..dd857b183f0 100644 --- a/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -262,13 +262,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h index e8e11c98a54..b2d4fb9f6b5 100644 --- a/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -237,13 +237,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h index 6911464a2f1..a850b449318 100644 --- a/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -225,13 +225,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h index 930a0bf2a96..a8477871a1d 100644 --- a/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -284,13 +284,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h index 30b689bd818..a3b65fbb137 100644 --- a/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -931,13 +931,16 @@ static inline void spi_ll_set_mosi_delay(spi_dev_t *hw, int delay_mode, int dela } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h index 165a25f7902..81598615032 100644 --- a/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -270,13 +270,14 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h index 3d1ac3e56cf..b40a1e27c02 100644 --- a/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -262,13 +262,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/include/hal/spi_hal.h b/components/esp_hal_gpspi/include/hal/spi_hal.h index 7479f82a2d0..4561c4f34e4 100644 --- a/components/esp_hal_gpspi/include/hal/spi_hal.h +++ b/components/esp_hal_gpspi/include/hal/spi_hal.h @@ -163,12 +163,12 @@ typedef struct { void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id); /** - * Config default output IO level when don't have transaction + * Config default output data IO level when bus idle * * @param hal Context of the HAL layer. * @param level IO level to config */ -void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level); +void spi_hal_set_data_pin_idle_level(spi_hal_context_t *hal, bool level); /** * Deinit the peripheral (and the context if needed). diff --git a/components/esp_hal_gpspi/spi_hal.c b/components/esp_hal_gpspi/spi_hal.c index f49feca0e73..92c71085f63 100644 --- a/components/esp_hal_gpspi/spi_hal.c +++ b/components/esp_hal_gpspi/spi_hal.c @@ -27,11 +27,11 @@ void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id) spi_ll_apply_config(hw); } -void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level) +void spi_hal_set_data_pin_idle_level(spi_hal_context_t *hal, bool level) { #if SPI_LL_MOSI_FREE_LEVEL // Config default output data line level when don't have transaction - spi_ll_set_mosi_free_level(hal->hw, level); + spi_ll_set_data_pin_idle_level(hal->hw, level); spi_ll_apply_config(hal->hw); #endif }