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refactor(uart): clean up uart soc_caps
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@@ -40,7 +40,7 @@
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#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
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#define UART_LL_FSM_IDLE (0x0)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf)
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#define UART_LL_FSM_TX_WAIT_SEND (0xf) // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val) \
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if ((hw) == &UART0) { \
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