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refactor(spi_flash): move os layer to esp_mspi and chip configs to spi_flash

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Also fixes the implicit dependency on esp_partition.
This commit is contained in:
armando
2026-09-09 14:17:00 +08:00
committed by Armando (Dou Yiwen)
parent c565262ded
commit 6e3abd12a1
197 changed files with 1227 additions and 1139 deletions
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components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+14 -22
View File
@@ -4,17 +4,22 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include <bootloader_flash_priv.h>
#include <esp_log.h>
#include "esp_efuse.h"
#include "sdkconfig.h"
#include "esp_efuse.h"
#include "esp_log.h"
#include "esp_flash_encrypt.h"
#include "esp_private/bootloader_flash_internal.h"
#include "soc/soc_caps.h"
#include "hal/efuse_ll.h"
#include "hal/efuse_hal.h"
#include "hal/spi_flash_types.h"
#include "hal/esp_flash_err.h"
#include "spi_flash_defs.h"
#if !NON_OS_BUILD
#include "spi_flash_mmap.h"
// This dependency will be removed in the future. IDF-5025
#include "esp_flash.h"
#endif
#include "hal/spi_flash_ll.h"
#include "rom/spi_flash.h"
@@ -23,9 +28,6 @@
#include "hal/spimem_flash_ll.h"
#endif
// This dependency will be removed in the future. IDF-5025
#include "esp_flash.h"
#include "esp_rom_spiflash.h"
#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
@@ -64,7 +66,7 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
return NULL; /* existing mapping in use... */
}
const void *result = NULL;
uint32_t src_page = src_addr & ~(SPI_FLASH_MMU_PAGE_SIZE - 1);
uint32_t src_page = src_addr & ~(CONFIG_MMU_PAGE_SIZE - 1);
size += (src_addr - src_page);
esp_err_t err = spi_flash_mmap(src_page, size, SPI_FLASH_MMAP_FLAG_DATA | SPI_FLASH_MMAP_FLAG_BLOCKS_WRITE, &result, &map);
if (err != ESP_OK) {
@@ -123,7 +125,6 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
#include "hal/mmu_ll.h"
#include "hal/cache_hal.h"
#include "hal/cache_ll.h"
#include "esp_flash_chips/spi_flash_defs.h"
#if ESP_TEE_BUILD
#include "esp_fault.h"
@@ -362,7 +363,7 @@ const void *bootloader_mmap(uint32_t src_paddr, uint32_t size)
#if CONFIG_IDF_TARGET_ESP32
uint32_t count = GET_REQUIRED_MMU_PAGES(size, src_paddr);
int e = cache_flash_mmu_set(0, 0, FLASH_MMAP_VADDR, src_paddr_aligned, 64, count);
ESP_EARLY_LOGV(TAG, "after mapping, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", src_paddr_aligned, (uint32_t)FLASH_MMAP_VADDR, count * SPI_FLASH_MMU_PAGE_SIZE);
ESP_EARLY_LOGV(TAG, "after mapping, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", src_paddr_aligned, (uint32_t)FLASH_MMAP_VADDR, count * CONFIG_MMU_PAGE_SIZE);
if (e != 0) {
ESP_EARLY_LOGE(TAG, "cache_flash_mmu_set failed: %d", e);
Cache_Read_Enable(0);
@@ -491,20 +492,20 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest
#else
cache_hal_suspend(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
//---------------Invalidating entries at to-be-mapped v_addr------------------------
cache_hal_invalidate_addr(FLASH_READ_VADDR, SPI_FLASH_MMU_PAGE_SIZE);
cache_hal_invalidate_addr(FLASH_READ_VADDR, CONFIG_MMU_PAGE_SIZE);
#endif
#endif
//---------------Do mapping------------------------
ESP_EARLY_LOGD(TAG, "mmu set block paddr=0x%08" PRIx32 " (was 0x%08" PRIx32 ")", map_at, current_read_mapping);
#if CONFIG_IDF_TARGET_ESP32
//Should never fail if we only map a SPI_FLASH_MMU_PAGE_SIZE to the vaddr starting from FLASH_READ_VADDR
//Should never fail if we only map a CONFIG_MMU_PAGE_SIZE to the vaddr starting from FLASH_READ_VADDR
// Return value unused if asserts are disabled
int e __attribute__((unused)) = cache_flash_mmu_set(0, 0, FLASH_READ_VADDR, map_at, 64, 1);
assert(e == 0);
#else
uint32_t actual_mapped_len = 0;
mmu_hal_map_region(0, MMU_TARGET_FLASH0, FLASH_READ_VADDR, map_at, SPI_FLASH_MMU_PAGE_SIZE - 1, &actual_mapped_len);
mmu_hal_map_region(0, MMU_TARGET_FLASH0, FLASH_READ_VADDR, map_at, CONFIG_MMU_PAGE_SIZE - 1, &actual_mapped_len);
#endif
current_read_mapping = map_at;
@@ -1017,15 +1018,6 @@ esp_err_t IRAM_ATTR bootloader_flash_reset_chip(void)
return ESP_OK;
}
bool IRAM_ATTR bootloader_flash_is_octal_mode_enabled(void)
{
#if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
return efuse_ll_get_flash_type();
#else
return false;
#endif
}
esp_rom_spiflash_read_mode_t bootloader_flash_get_spi_mode(void)
{
esp_rom_spiflash_read_mode_t spi_mode = ESP_ROM_SPIFLASH_FASTRD_MODE;
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s3.c
+6 -4
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -20,7 +20,8 @@
#include "soc/soc_caps.h"
#include "flash_qio_mode.h"
#include "bootloader_flash_config.h"
#include "bootloader_flash_priv.h"
#include "esp_private/bootloader_flash_internal.h"
#include "spi_flash_defs.h"
#include "bootloader_common.h"
#include "bootloader_flash.h"
#include "bootloader_init.h"
@@ -28,6 +29,7 @@
#include "hal/mmu_ll.h"
#include "hal/cache_hal.h"
#include "hal/cache_ll.h"
#include "hal/efuse_ll.h"
#define FLASH_IO_MATRIX_DUMMY_40M 0
#define FLASH_IO_MATRIX_DUMMY_80M 0
@@ -50,7 +52,7 @@ void bootloader_flash_update_size(uint32_t size)
void IRAM_ATTR bootloader_flash_cs_timing_config()
{
//SPI0/1 share the cs_hold / cs_setup, cd_hold_time / cd_setup_time, cs_hold_delay registers for FLASH, so we only need to set SPI0 related registers here
if (bootloader_flash_is_octal_mode_enabled()) {
if (efuse_ll_get_flash_type()) {
SET_PERI_REG_MASK(SPI_MEM_USER_REG(0), SPI_MEM_CS_HOLD_M | SPI_MEM_CS_SETUP_M);
SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(0), SPI_MEM_CS_HOLD_TIME_V, FLASH_CS_HOLD_TIME, SPI_MEM_CS_HOLD_TIME_S);
@@ -286,7 +288,7 @@ esp_err_t bootloader_init_spi_flash(void)
bootloader_flash_unlock();
#if CONFIG_ESPTOOLPY_FLASHMODE_QIO || CONFIG_ESPTOOLPY_FLASHMODE_QOUT
if (!bootloader_flash_is_octal_mode_enabled()) {
if (!efuse_ll_get_flash_type()) {
bootloader_enable_qio_mode();
}
#endif