mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-01 18:50:34 +03:00
refactor(spi_flash): move os layer to esp_mspi and chip configs to spi_flash
Also fixes the implicit dependency on esp_partition.
This commit is contained in:
armando
committed by
Armando (Dou Yiwen)
Armando (Dou Yiwen)
parent
c565262ded
commit
6e3abd12a1
@@ -100,8 +100,8 @@ else()
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set(priv_requires spi_flash efuse heap esp_bootloader_format esp_app_format
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esptool_py)
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# `esp_hal_ana_conv` is required by bootloader_random_esp32xx.c
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list(APPEND priv_requires esp_hal_wdt esp_hal_gpio esp_hal_uart esp_hal_ana_conv esp_hal_rtc_timer
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esp_hal_clock esp_hal_security esp_hal_debug_assist)
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list(APPEND priv_requires esp_mspi esp_hal_wdt esp_hal_gpio esp_hal_uart esp_hal_ana_conv
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esp_hal_rtc_timer esp_hal_clock esp_hal_security esp_hal_debug_assist)
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endif()
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# src/flash_encrypt.c includes esp_security/esp_key_mgr.h on
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -7,8 +7,7 @@
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#include <stdint.h>
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#include <esp_err.h>
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#include "spi_flash_mmap.h" /* including in bootloader for error values */
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#include "esp_private/spi_flash_os.h"
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#include "esp_rom_spiflash.h"
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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#include "bootloader_flash_override.h"
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@@ -59,6 +58,7 @@ esp_err_t bootloader_flash_reset_chip(void);
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*
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* @return True if flash is in octal mode, false else
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*/
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__attribute__((deprecated("in favor of spi_flash_is_octal_mode_enabled")))
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bool bootloader_flash_is_octal_mode_enabled(void);
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/**
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@@ -1,46 +1,22 @@
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/*
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __BOOTLOADER_FLASH_H
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#define __BOOTLOADER_FLASH_H
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#pragma once
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#include <stddef.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <esp_err.h>
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#include <spi_flash_mmap.h> /* including in bootloader for error values */
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#include "sdkconfig.h"
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#include "bootloader_flash.h"
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#include "soc/ext_mem_defs.h"
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#include "bootloader_flash_override.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define FLASH_SECTOR_SIZE 0x1000
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#define FLASH_BLOCK_SIZE 0x10000
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#define MMAP_ALIGNED_MASK (SPI_FLASH_MMU_PAGE_SIZE - 1)
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#define MMU_FLASH_MASK (~(SPI_FLASH_MMU_PAGE_SIZE - 1))
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#define MMU_FLASH_MASK_FROM_VAL(PAGE_SZ) (~((PAGE_SZ) - 1))
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#define MMU_DROM_END_ENTRY_VADDR_FROM_VAL(PAGE_SZ) (SOC_DRAM_FLASH_ADDRESS_HIGH - (PAGE_SZ))
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/**
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* MMU mapping must always be in the unit of a SPI_FLASH_MMU_PAGE_SIZE
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* This macro is a helper for you to get needed page nums to be mapped. e.g.:
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* Let's say SPI_FLASH_MMU_PAGE_SIZE is 64KB.
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* - v_start = 0x4200_0004
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* - size = 4 * 64KB
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*
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* You should map from 0x4200_0000, then map 5 pages.
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/*
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* SPI commands
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* These are deprecated, use the ones in spi_flash_defs.h instead.
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*/
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#define GET_REQUIRED_MMU_PAGES(size, v_start) ((size + (v_start - (v_start & MMU_FLASH_MASK)) + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE)
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/* SPI commands (actual on-wire commands not SPI controller bitmasks)
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Suitable for use with the bootloader_execute_flash_command static function.
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*/
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#define CMD_RDID 0x9F
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#define CMD_WRSR 0x01
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#define CMD_WRSR2 0x31 /* Not all SPI flash uses this command */
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@@ -62,146 +38,3 @@ extern "C" {
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#define CMD_FASTRD_DUAL_4B 0x3C
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#define CMD_FASTRD_4B 0x0C
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#define CMD_SLOWRD_4B 0x13
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/* Provide a Flash API for bootloader_support code,
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that can be used from bootloader or app code.
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This header is available to source code in the bootloader &
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bootloader_support components only.
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*/
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/**
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* @brief Get number of free pages
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*
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* @return Number of free pages
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*/
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uint32_t bootloader_mmap_get_free_pages(void);
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/**
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* @brief Map a region of flash to data memory
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*
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* @important In bootloader code, only one region can be bootloader_mmaped at once. The previous region must be bootloader_munmapped before another region is mapped.
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*
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* @important In app code, these functions are not thread safe.
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*
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* Call bootloader_munmap once for each successful call to bootloader_mmap.
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*
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* In esp-idf app, this function maps directly to spi_flash_mmap with the @ref
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* spi_flash_mmap_flag_t::SPI_FLASH_MMAP_FLAG_BLOCKS_WRITE flag set. When XIP on PSRAM (`CONFIG_SPIRAM_XIP_FROM_PSRAM`) enabled, flash erasing/writing
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* will be blocked until unmap.
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*
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* @param offset - Starting flash offset to map to memory.
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* @param length - Length of data to map.
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*
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* @return Pointer to mapped data memory (at src_addr), or NULL
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* if an allocation error occurred.
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*/
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const void *bootloader_mmap(uint32_t src_addr, uint32_t size);
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/**
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* @brief Unmap a previously mapped region of flash
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*
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* Call bootloader_munmap once for each successful call to bootloader_mmap.
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*/
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void bootloader_munmap(const void *mapping);
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/**
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* @brief Read data from Flash.
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*
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*
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* @note All of src, dest and size have to be 4-byte aligned.
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*
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* @param src source address of the data in Flash.
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* @param dest pointer to the destination buffer
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* @param size length of data
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* @param allow_decrypt If true and flash encryption is enabled, data on flash
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* will be decrypted transparently as part of the read.
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*
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* @return ESP_OK on success, ESP_ERR_FLASH_OP_FAIL on SPI failure,
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* ESP_ERR_FLASH_OP_TIMEOUT on SPI timeout.
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*/
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esp_err_t bootloader_flash_read(size_t src_addr, void *dest, size_t size, bool allow_decrypt);
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/**
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* @brief Write data to Flash.
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*
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* @note All of dest_addr, src and size have to be 4-byte aligned. If write_encrypted is set, dest_addr and size must be 32-byte aligned.
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*
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* @note In bootloader, when write_encrypted == true, the src buffer is encrypted in place.
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*
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* @note [ESP-TEE] Using this API from the TEE will return an error if the dest_addr lies
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* within the active TEE partition range.
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*
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* @param dest_addr Destination address to write in Flash.
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* @param src Pointer to the data to write to flash
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* @param size Length of data in bytes.
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* @param write_encrypted If true, data will be written encrypted on flash.
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*
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* @return ESP_OK on success, ESP_ERR_FLASH_OP_FAIL on SPI failure,
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* ESP_ERR_FLASH_OP_TIMEOUT on SPI timeout.
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*/
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esp_err_t bootloader_flash_write(size_t dest_addr, void *src, size_t size, bool write_encrypted);
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/**
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* @brief Erase the Flash sector.
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*
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* @param sector Sector number, the count starts at sector 0, 4KB per sector.
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*
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* @return esp_err_t
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*/
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esp_err_t bootloader_flash_erase_sector(size_t sector);
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/**
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* @brief Erase the Flash range.
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*
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* @note [ESP-TEE] Using this API from the TEE will return an error if the start_addr lies
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* within the active TEE partition range.
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*
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* @param start_addr start address of flash offset
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* @param size sector aligned size to be erased
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*
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* @return esp_err_t
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*/
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esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size);
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/**
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* @brief Execute a user command on the flash
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*
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* @param command The command value to execute.
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* @param mosi_data MOSI data to send
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* @param mosi_len Length of MOSI data, in bits
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* @param miso_len Length of MISO data to receive, in bits
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* @return Received MISO data
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*/
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uint32_t bootloader_execute_flash_command(uint8_t command, uint32_t mosi_data, uint8_t mosi_len, uint8_t miso_len);
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/**
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* @brief Read the SFDP of the flash
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*
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* @param sfdp_addr Address of the parameter to read
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* @param miso_byte_num Bytes to read
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* @return The read SFDP, little endian, 4 bytes at most
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*/
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uint32_t bootloader_flash_read_sfdp(uint32_t sfdp_addr, unsigned int miso_byte_num);
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/**
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* @brief Enable the flash write protect (WEL bit).
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*/
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void bootloader_enable_wp(void);
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/**
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* @brief Once this function is called,
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* any on-going internal operations will be terminated and the device will return to its default power-on
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* state and lose all the current volatile settings, such as Volatile Status Register bits, Write Enable Latch
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* (WEL) status, Program/Erase Suspend status, etc.
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*/
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void bootloader_spi_flash_reset(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -4,17 +4,22 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <bootloader_flash_priv.h>
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#include <esp_log.h>
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#include "esp_efuse.h"
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#include "sdkconfig.h"
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#include "esp_efuse.h"
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#include "esp_log.h"
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#include "esp_flash_encrypt.h"
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#include "esp_private/bootloader_flash_internal.h"
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#include "soc/soc_caps.h"
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#include "hal/efuse_ll.h"
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#include "hal/efuse_hal.h"
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#include "hal/spi_flash_types.h"
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#include "hal/esp_flash_err.h"
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#include "spi_flash_defs.h"
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#if !NON_OS_BUILD
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#include "spi_flash_mmap.h"
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// This dependency will be removed in the future. IDF-5025
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#include "esp_flash.h"
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#endif
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#include "hal/spi_flash_ll.h"
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#include "rom/spi_flash.h"
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@@ -23,9 +28,6 @@
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#include "hal/spimem_flash_ll.h"
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#endif
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// This dependency will be removed in the future. IDF-5025
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#include "esp_flash.h"
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#include "esp_rom_spiflash.h"
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#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
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@@ -64,7 +66,7 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
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return NULL; /* existing mapping in use... */
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}
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const void *result = NULL;
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uint32_t src_page = src_addr & ~(SPI_FLASH_MMU_PAGE_SIZE - 1);
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uint32_t src_page = src_addr & ~(CONFIG_MMU_PAGE_SIZE - 1);
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size += (src_addr - src_page);
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esp_err_t err = spi_flash_mmap(src_page, size, SPI_FLASH_MMAP_FLAG_DATA | SPI_FLASH_MMAP_FLAG_BLOCKS_WRITE, &result, &map);
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if (err != ESP_OK) {
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@@ -123,7 +125,6 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
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#include "hal/mmu_ll.h"
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#include "hal/cache_hal.h"
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#include "hal/cache_ll.h"
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#include "esp_flash_chips/spi_flash_defs.h"
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#if ESP_TEE_BUILD
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#include "esp_fault.h"
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@@ -362,7 +363,7 @@ const void *bootloader_mmap(uint32_t src_paddr, uint32_t size)
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#if CONFIG_IDF_TARGET_ESP32
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uint32_t count = GET_REQUIRED_MMU_PAGES(size, src_paddr);
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int e = cache_flash_mmu_set(0, 0, FLASH_MMAP_VADDR, src_paddr_aligned, 64, count);
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ESP_EARLY_LOGV(TAG, "after mapping, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", src_paddr_aligned, (uint32_t)FLASH_MMAP_VADDR, count * SPI_FLASH_MMU_PAGE_SIZE);
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ESP_EARLY_LOGV(TAG, "after mapping, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", src_paddr_aligned, (uint32_t)FLASH_MMAP_VADDR, count * CONFIG_MMU_PAGE_SIZE);
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if (e != 0) {
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ESP_EARLY_LOGE(TAG, "cache_flash_mmu_set failed: %d", e);
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Cache_Read_Enable(0);
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@@ -491,20 +492,20 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest
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#else
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cache_hal_suspend(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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//---------------Invalidating entries at to-be-mapped v_addr------------------------
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cache_hal_invalidate_addr(FLASH_READ_VADDR, SPI_FLASH_MMU_PAGE_SIZE);
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cache_hal_invalidate_addr(FLASH_READ_VADDR, CONFIG_MMU_PAGE_SIZE);
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#endif
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#endif
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//---------------Do mapping------------------------
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ESP_EARLY_LOGD(TAG, "mmu set block paddr=0x%08" PRIx32 " (was 0x%08" PRIx32 ")", map_at, current_read_mapping);
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#if CONFIG_IDF_TARGET_ESP32
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//Should never fail if we only map a SPI_FLASH_MMU_PAGE_SIZE to the vaddr starting from FLASH_READ_VADDR
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//Should never fail if we only map a CONFIG_MMU_PAGE_SIZE to the vaddr starting from FLASH_READ_VADDR
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// Return value unused if asserts are disabled
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int e __attribute__((unused)) = cache_flash_mmu_set(0, 0, FLASH_READ_VADDR, map_at, 64, 1);
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assert(e == 0);
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#else
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uint32_t actual_mapped_len = 0;
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mmu_hal_map_region(0, MMU_TARGET_FLASH0, FLASH_READ_VADDR, map_at, SPI_FLASH_MMU_PAGE_SIZE - 1, &actual_mapped_len);
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mmu_hal_map_region(0, MMU_TARGET_FLASH0, FLASH_READ_VADDR, map_at, CONFIG_MMU_PAGE_SIZE - 1, &actual_mapped_len);
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#endif
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current_read_mapping = map_at;
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@@ -1017,15 +1018,6 @@ esp_err_t IRAM_ATTR bootloader_flash_reset_chip(void)
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return ESP_OK;
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}
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bool IRAM_ATTR bootloader_flash_is_octal_mode_enabled(void)
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{
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#if SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE
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return efuse_ll_get_flash_type();
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#else
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return false;
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#endif
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}
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esp_rom_spiflash_read_mode_t bootloader_flash_get_spi_mode(void)
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{
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esp_rom_spiflash_read_mode_t spi_mode = ESP_ROM_SPIFLASH_FASTRD_MODE;
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+6
-4
@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -20,7 +20,8 @@
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#include "soc/soc_caps.h"
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#include "flash_qio_mode.h"
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#include "bootloader_flash_config.h"
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#include "bootloader_flash_priv.h"
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#include "esp_private/bootloader_flash_internal.h"
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#include "spi_flash_defs.h"
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#include "bootloader_common.h"
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#include "bootloader_flash.h"
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#include "bootloader_init.h"
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@@ -28,6 +29,7 @@
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#include "hal/mmu_ll.h"
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#include "hal/cache_hal.h"
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#include "hal/cache_ll.h"
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#include "hal/efuse_ll.h"
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#define FLASH_IO_MATRIX_DUMMY_40M 0
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#define FLASH_IO_MATRIX_DUMMY_80M 0
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@@ -50,7 +52,7 @@ void bootloader_flash_update_size(uint32_t size)
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void IRAM_ATTR bootloader_flash_cs_timing_config()
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{
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//SPI0/1 share the cs_hold / cs_setup, cd_hold_time / cd_setup_time, cs_hold_delay registers for FLASH, so we only need to set SPI0 related registers here
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if (bootloader_flash_is_octal_mode_enabled()) {
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if (efuse_ll_get_flash_type()) {
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SET_PERI_REG_MASK(SPI_MEM_USER_REG(0), SPI_MEM_CS_HOLD_M | SPI_MEM_CS_SETUP_M);
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SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(0), SPI_MEM_CS_HOLD_TIME_V, FLASH_CS_HOLD_TIME, SPI_MEM_CS_HOLD_TIME_S);
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@@ -286,7 +288,7 @@ esp_err_t bootloader_init_spi_flash(void)
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bootloader_flash_unlock();
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#if CONFIG_ESPTOOLPY_FLASHMODE_QIO || CONFIG_ESPTOOLPY_FLASHMODE_QOUT
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if (!bootloader_flash_is_octal_mode_enabled()) {
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if (!efuse_ll_get_flash_type()) {
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bootloader_enable_qio_mode();
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}
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#endif
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@@ -19,9 +19,10 @@
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||||
#include "soc/efuse_reg.h"
|
||||
#include "soc/chip_revision.h"
|
||||
#include "hal/efuse_hal.h"
|
||||
#include "hal/misc.h"
|
||||
#include "esp_image_format.h"
|
||||
#include "sys/param.h"
|
||||
#include "bootloader_flash_priv.h"
|
||||
#include "esp_private/bootloader_flash_internal.h"
|
||||
#include "esp_rom_caps.h"
|
||||
#include "esp_macros.h"
|
||||
|
||||
|
||||
@@ -38,7 +38,7 @@
|
||||
#include "esp_secure_boot.h"
|
||||
#include "esp_flash_encrypt.h"
|
||||
#include "esp_flash_partitions.h"
|
||||
#include "bootloader_flash_priv.h"
|
||||
#include "esp_private/bootloader_flash_internal.h"
|
||||
#include "bootloader_random.h"
|
||||
#include "bootloader_config.h"
|
||||
#include "bootloader_common.h"
|
||||
@@ -1067,12 +1067,12 @@ static void set_cache_and_start_app(
|
||||
//The addr is aligned, so we add the mask off length to the size, to make sure the corresponding buses are enabled.
|
||||
drom_size = (drom_load_addr - drom_load_addr_aligned) + drom_size;
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
uint32_t drom_page_count = (drom_size + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE;
|
||||
uint32_t drom_page_count = (drom_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE;
|
||||
rc = cache_flash_mmu_set(0, 0, drom_load_addr_aligned, drom_addr_aligned, 64, drom_page_count);
|
||||
ESP_EARLY_LOGV(TAG, "rc=%d", rc);
|
||||
rc = cache_flash_mmu_set(1, 0, drom_load_addr_aligned, drom_addr_aligned, 64, drom_page_count);
|
||||
ESP_EARLY_LOGV(TAG, "rc=%d", rc);
|
||||
ESP_EARLY_LOGV(TAG, "after mapping rodata, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, drom_page_count * SPI_FLASH_MMU_PAGE_SIZE);
|
||||
ESP_EARLY_LOGV(TAG, "after mapping rodata, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, drom_page_count * CONFIG_MMU_PAGE_SIZE);
|
||||
#else
|
||||
uint32_t actual_mapped_len = 0;
|
||||
if (s_flash_seg_needs_map(drom_load_addr_aligned)) {
|
||||
@@ -1091,12 +1091,12 @@ static void set_cache_and_start_app(
|
||||
//The addr is aligned, so we add the mask off length to the size, to make sure the corresponding buses are enabled.
|
||||
irom_size = (irom_load_addr - irom_load_addr_aligned) + irom_size;
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
uint32_t irom_page_count = (irom_size + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE;
|
||||
uint32_t irom_page_count = (irom_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE;
|
||||
rc = cache_flash_mmu_set(0, 0, irom_load_addr_aligned, irom_addr_aligned, 64, irom_page_count);
|
||||
ESP_EARLY_LOGV(TAG, "rc=%d", rc);
|
||||
rc = cache_flash_mmu_set(1, 0, irom_load_addr_aligned, irom_addr_aligned, 64, irom_page_count);
|
||||
ESP_LOGV(TAG, "rc=%d", rc);
|
||||
ESP_EARLY_LOGV(TAG, "after mapping text, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", irom_addr_aligned, irom_load_addr_aligned, irom_page_count * SPI_FLASH_MMU_PAGE_SIZE);
|
||||
ESP_EARLY_LOGV(TAG, "after mapping text, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", irom_addr_aligned, irom_load_addr_aligned, irom_page_count * CONFIG_MMU_PAGE_SIZE);
|
||||
#else
|
||||
if (s_flash_seg_needs_map(irom_load_addr_aligned)) {
|
||||
mmu_hal_map_region(0, MMU_TARGET_FLASH0, irom_load_addr_aligned, irom_addr_aligned, irom_size, &actual_mapped_len);
|
||||
|
||||
@@ -33,6 +33,7 @@
|
||||
#include "hal/assist_debug_ll.h"
|
||||
#include "esp_rom_sys.h"
|
||||
#include "soc/regi2c_bias.h"
|
||||
#include "soc/regi2c_mpll.h"
|
||||
#include "hal/regi2c_ctrl.h"
|
||||
#include "hal/psram_ctrlr_ll.h"
|
||||
|
||||
|
||||
Reference in New Issue
Block a user