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refactor(clk_tree): use general api to enable the clk

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This commit is contained in:
Chen Jichang
2026-04-16 20:03:06 +08:00
parent 54ecf4c09f
commit 6e206dd173
57 changed files with 1180 additions and 694 deletions
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components/esp_driver_dac/esp32s2/dac_dma.c
+5 -5
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -25,7 +25,7 @@
#include "soc/soc.h"
#include "soc/soc_caps.h"
#include "../dac_priv_dma.h"
#include "clk_ctrl_os.h"
#include "esp_clk_tree.h"
#if CONFIG_DAC_ENABLE_DEBUG_LOG
// The local log level must be defined before including esp_log.h
// Set the maximum log level for this source file
@@ -52,7 +52,7 @@ static uint32_t s_dac_set_apll_freq(uint32_t expt_freq)
{
/* Set APLL coefficients to the given frequency */
uint32_t real_freq = 0;
esp_err_t ret = periph_rtc_apll_freq_set(expt_freq, &real_freq);
esp_err_t ret = esp_clk_tree_src_set_freq_hz(SOC_MOD_CLK_APLL, expt_freq, &real_freq);
if (ret == ESP_ERR_INVALID_ARG) {
return 0;
}
@@ -138,7 +138,7 @@ esp_err_t dac_dma_periph_init(uint32_t freq_hz, bool is_alternate, bool is_apll)
s_ddp->periph_dev = (void *)SPI_LL_GET_HW(DAC_DMA_PERIPH_SPI_HOST);
if (is_apll) {
periph_rtc_apll_acquire();
ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src(SOC_MOD_CLK_APLL, true), err, TAG, "APLL enable failed");
s_ddp->use_apll = true;
}
/* When transmit alternately, twice frequency is needed to guarantee the convert frequency in one channel */
@@ -167,7 +167,7 @@ esp_err_t dac_dma_periph_deinit(void)
adc_apb_periph_free();
if (s_ddp) {
if (s_ddp->use_apll) {
periph_rtc_apll_release();
ESP_RETURN_ON_ERROR(esp_clk_tree_enable_src(SOC_MOD_CLK_APLL, false), TAG, "APLL disable failed");
s_ddp->use_apll = false;
}
free(s_ddp);