Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 11:10:54 +03:00
Code Issues Packages Projects Releases Wiki Activity

feat(clk): Add basic clock support for esp32h21

Browse Source
This commit is contained in:
Song Ruo Jing
2025-06-16 15:05:32 +08:00
parent 2fb938c7c3
commit 6d293c8582
90 changed files with 833 additions and 858 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/test_apps/rtc_clk/CMakeLists.txt
+4
View File
@@ -7,4 +7,8 @@ set(EXTRA_COMPONENT_DIRS "$ENV{IDF_PATH}/tools/unit-test-app/components")
list(PREPEND SDKCONFIG_DEFAULTS "$ENV{IDF_PATH}/tools/test_apps/configs/sdkconfig.debug_helpers" "sdkconfig.defaults")
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
set(COMPONENTS main)
project(rtc_clk)
components/esp_hw_support/test_apps/rtc_clk/README.md
+2 -2
View File
@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |
components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c
+8 -4
View File
@@ -244,8 +244,9 @@ static void start_freq(soc_rtc_slow_clk_src_t required_src, uint32_t start_delay
} else {
printf("PASS. Time measurement...");
}
uint64_t clk_rtc_time;
uint32_t fail_measure = 0;
#if SOC_LP_TIMER_SUPPORTED
uint64_t clk_rtc_time;
for (int j = 0; j < 3; ++j) {
clk_rtc_time = esp_clk_rtc_time();
esp_rom_delay_us(1000000);
@@ -257,6 +258,7 @@ static void start_freq(soc_rtc_slow_clk_src_t required_src, uint32_t start_delay
break;
}
}
#endif
if(fail_measure == 0) {
printf("PASS");
}
@@ -285,10 +287,10 @@ TEST_CASE("Test starting external RTC quartz", "[rtc_clk][test_env=xtal32k]")
bootstrap_cycles,
CONFIG_RTC_CLK_CAL_CYCLES);
#endif // CONFIG_RTC_CLK_SRC_EXT_CRYS
if (CONFIG_RTC_CLK_CAL_CYCLES < 1500){
if (CONFIG_RTC_CLK_CAL_CYCLES < 1500) {
printf("Recommended increase Number of cycles for RTC_SLOW_CLK calibration to 3000!\n");
}
while(i < COUNT_TEST){
while (i < COUNT_TEST) {
start_time = xTaskGetTickCount() * (1000 / configTICK_RATE_HZ);
i++;
printf("attempt #%d/%d...", i, COUNT_TEST);
@@ -296,7 +298,7 @@ TEST_CASE("Test starting external RTC quartz", "[rtc_clk][test_env=xtal32k]")
rtc_clk_select_rtc_slow_clk();
end_time = xTaskGetTickCount() * (1000 / configTICK_RATE_HZ);
printf(" [time=%"PRIu32"] ", end_time - start_time);
if((end_time - start_time) > TIMEOUT_TEST_MS){
if ((end_time - start_time) > TIMEOUT_TEST_MS) {
printf("FAIL\n");
fail = 1;
} else {
@@ -332,6 +334,7 @@ TEST_CASE("Test starting 'External 32kHz XTAL' on the board without it.", "[rtc_
#endif // !defined(CONFIG_IDF_CI_BUILD) || !CONFIG_SPIRAM_BANKSWITCH_ENABLE
#endif // SOC_CLK_XTAL32K_SUPPORTED
#if SOC_LP_TIMER_SUPPORTED
TEST_CASE("Test rtc clk calibration compensation", "[rtc_clk]")
{
int64_t t1 = esp_rtc_get_time_us();
@@ -358,6 +361,7 @@ TEST_CASE("Test rtc clk calibration compensation", "[rtc_clk]")
TEST_ASSERT_GREATER_THAN(t1, t2);
}
#endif
#if SOC_DEEP_SLEEP_SUPPORTED
static RTC_NOINIT_ATTR int64_t start = 0;