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Merge branch 'feature/ulp_riscv_adc' into 'master'

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ulp-riscv: add support for using ADC as well as an example show-casing it.

Closes IDFGH-7564 and IDF-1714

See merge request espressif/esp-idf!18767
This commit is contained in:
Marius Vikhammer
2022-07-11 12:30:31 +08:00
parent f5c3c533bb e8b5096f52
commit 6cc871d793
33 changed files with 415 additions and 29 deletions
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2
components/bootloader_support/src/bootloader_random_esp32s3.c
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@@ -83,8 +83,6 @@ void bootloader_random_disable(void)
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_RTC_ADDR, 0);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR, 0);
//Stop SAR ADC clock
CLEAR_PERI_REG_MASK(SENS_SAR_PERI_CLK_GATE_CONF_REG, SENS_SARADC_CLK_EN);
//Power off SAR ADC
REG_SET_FIELD(SENS_SAR_POWER_XPD_SAR_REG, SENS_FORCE_XPD_SAR, 0);
//return to ADC RTC controller