Merge branch 'feat/update-memory-layout-c5-mp_v5.3' into 'release/v5.3'

feat(heap): support heap and update memory layout on esp32c5-mp target (backport v5.3)

See merge request espressif/esp-idf!31040
This commit is contained in:
Jiang Jiang Jian
2024-06-25 00:55:00 +08:00
4 changed files with 15 additions and 25 deletions
+1 -1
View File
@@ -208,7 +208,7 @@
#define SOC_DEBUG_HIGH 0x28000000
// Start (highest address) of ROM boot stack, only relevant during early boot
#define SOC_ROM_STACK_START 0x4085c8d0
#define SOC_ROM_STACK_START 0x4085e9a0
#define SOC_ROM_STACK_SIZE 0x2000
//On RISC-V CPUs, the interrupt sources are all external interrupts, whose type, source and priority are configured by SW.