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Merge branch 'bugfix/external_mem_enc_docs_v6.0' into 'release/v6.0'

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docs: update PSRAM and flash encryption docs with per-page and separate key capabilities (v6.0)

See merge request espressif/esp-idf!46955
This commit is contained in:
Mahavir Jain
2026-04-02 19:05:36 +05:30
parent 621d47f602 64c744abb7
commit 6bf6897d0d
14 changed files with 91 additions and 3 deletions
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components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+12
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@@ -1255,10 +1255,22 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_PSRAM_ENCRYPTION_XTS_AES_128
bool
default y
config SOC_PSRAM_ENCRYPTION_SEPARATE_KEY
bool
default y
config SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_RECOVERY_BOOTLOADER_SUPPORTED
bool
default y
components/soc/esp32c5/include/soc/soc_caps.h
+4 -1
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@@ -508,9 +508,12 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 /* SOC_EFUSE_XTS_AES_KEY_128 (1) || SOC_KEY_MANAGER_FE_KEY_DEPLOY_XTS_AES_128 (1) */
#define SOC_FLASH_ENCRYPTION_XTS_AES_256 1 /* SOC_EFUSE_XTS_AES_KEY_256 (0) || SOC_KEY_MANAGER_FE_KEY_DEPLOY_XTS_AES_256 (1) */
#define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND 1
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- PSRAM Encryption CAPS----------------------------*/
#define SOC_PSRAM_ENCRYPTION_XTS_AES_128 (1)
#define SOC_PSRAM_ENCRYPTION_XTS_AES_128 1
#define SOC_PSRAM_ENCRYPTION_SEPARATE_KEY 1 /* PSRAM encryption can use independent key */
#define SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE 1 /* PSRAM encryption can be configured on a MMU page basis */
/*------------------------Bootloader CAPS---------------------------------*/
/* Support Recovery Bootloader */
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+4
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@@ -1051,6 +1051,10 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_APM_CTRL_FILTER_SUPPORTED
bool
default y
components/soc/esp32c6/include/soc/soc_caps.h
+1
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@@ -437,6 +437,7 @@
#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX (64)
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- APM CAPS ----------------------------------------*/
#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+8
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@@ -939,6 +939,14 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_RECOVERY_BOOTLOADER_SUPPORTED
bool
default y
components/soc/esp32c61/include/soc/soc_caps.h
+4
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@@ -390,6 +390,10 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND 1
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- PSRAM Encryption CAPS----------------------------*/
#define SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE 1 /* PSRAM encryption can be configured on a MMU page basis */
/*------------------------Bootloader CAPS---------------------------------*/
/* Support Recovery Bootloader */
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+4
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@@ -1063,6 +1063,10 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_APM_CTRL_FILTER_SUPPORTED
bool
default y
components/soc/esp32h2/include/soc/soc_caps.h
+1
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@@ -457,6 +457,7 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND 1 /*!< Only avliable in chip version above 1.2*/
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- APM CAPS ----------------------------------------*/
#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
+12
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@@ -1663,6 +1663,18 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
bool
default y
config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_PSRAM_ENCRYPTION_SEPARATE_KEY
bool
default y
config SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE
bool
default y
config SOC_UART_NUM
int
default 6
components/soc/esp32p4/include/soc/soc_caps.h
+5
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@@ -634,6 +634,11 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 /* SOC_EFUSE_XTS_AES_KEY_128 (1) || SOC_KEY_MANAGER_FE_KEY_DEPLOY_XTS_AES_128 (1) */
#define SOC_FLASH_ENCRYPTION_XTS_AES_256 1 /* SOC_EFUSE_XTS_AES_KEY_256 (1) || SOC_KEY_MANAGER_FE_KEY_DEPLOY_XTS_AES_256 (1) */
#define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND 1 /*!< Only available in chip version above 3.0 */
#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
/*-------------------------- PSRAM Encryption CAPS----------------------------*/
#define SOC_PSRAM_ENCRYPTION_SEPARATE_KEY 1 /* PSRAM encryption can use independent key */
#define SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE 1 /* PSRAM encryption can be configured on a MMU page basis */
/*-------------------------- MEMPROT CAPS ------------------------------------*/