mirror of
https://github.com/espressif/esp-idf.git
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Merge branch 'feature/support_efuses_esp32s31' into 'master'
feat(efuse): Support efuses for ESP32S31 Closes IDF-14688 See merge request espressif/esp-idf!47986
This commit is contained in:
Konstantin Kondrashov
@@ -1,3 +1,194 @@
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.. note::
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.. code-block:: none
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To be updated.
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idf.py efuse-summary
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Executing action: efuse-summary
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(...)
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EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
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----------------------------------------------------------------------------------------
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Config fuses:
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WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000)
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RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000)
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RESERVED_0_39 (BLOCK0) Enable usb device exchange pins of D+ and D- = 0 R/W (0b000)
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DIS_TWAI (BLOCK0) Represents whether TWAI function is disabled or en = False R/W (0b0)
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abled. 1: disabled. 0: enabled
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EFUSE_DIS_WIFI6 (BLOCK0) USB intphy of usb device signle-end input high thr = False R/W (0b0)
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eshold; 1.76V to 2V. Step by 80mV
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KM_HUK_GEN_STATE (BLOCK0) Set this bit to control validation of HUK generate = 0 R/W (0b00000)
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mode. Odd of 1 is invalid; even of 1 is valid
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KM_RND_SWITCH_CYCLE (BLOCK0) Set bits to control key manager random number swit = False R/W (0b0)
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ch cycle. 0: control by register. 1: 8 km clk cycl
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es. 2: 16 km cycles. 3: 32 km cycles
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KM_DISABLE_DEPLOY_MODE (BLOCK0) Set bits to control key manager random number swit = 0 R/W (0b00000)
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ch cycle. 0: control by register. 1: 8 km clk cycl
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es. 2: 16 km cycles. 3: 32 km cycles
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KM_DEPLOY_ONLY_ONCE (BLOCK0) Set each bit to control whether corresponding key = 0 R/W (0b00000)
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can only be deployed once. 1 is true; 0 is false.
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Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
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ECC_FORCE_CONST_TIME (BLOCK0) Represents the spa secure level by configuring the = False R/W (0b0)
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clock random divide mode
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DIS_DIRECT_BOOT (BLOCK0) Represents whether direct boot mode is disabled or = False R/W (0b0)
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enabled. 1: disabled. 0: enabled
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UART_PRINT_CONTROL (BLOCK0) Represents the type of UART printing. 00: force en = 0 R/W (0b00)
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able printing. 01: enable printing when GPIO8 is r
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eset at low level. 10: enable printing when GPIO8
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is reset at high level. 11: force disable printing
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HYS_EN_PAD (BLOCK0) Represents whether the hysteresis function of = False R/W (0b0)
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corresponding PAD is enabled. 1: enabled. 0:disabled
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DCDC_VSET_EN (BLOCK0) Select dcdc vset use efuse_dcdc_vset = False R/W (0b0)
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DIS_SWD (BLOCK0) Set this bit to disable super-watchdog = False R/W (0b0)
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BOOTLOADER_ANTI_ROLLBACK_EN (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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BOOTLOADER_ANTI_ROLLBACK_UPDATE (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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RMA_ENA (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = 0 R/W (0b00)
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RMA_SESSION_COUNTER (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = 0 R/W (0b000)
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RMA_NONCE_ENA (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = 0 R/W (0b00)
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RMA_CHIP_INFO_SOURCE (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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RMA_DISABLE_FAST_VEF (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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PVT_0_GLITCH_EN (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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PVT_0_GLITCH_MODE (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = 0 R/W (0b00)
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PVT_1_GLITCH_EN (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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PVT_1_GLITCH_MODE (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = 0 R/W (0b00)
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POWER_GLITCH_EN (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = 0 R/W (0x0)
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XTS_SHADOW_EN (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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SPI_BOOT_CRYPT_SCRAMBLER_EN (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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PSRAM_CAP (BLOCK1) PSRAM capacity = 0 R/W (0b000)
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TEMP (BLOCK1) Operating temperature of the ESP chip = 0 R/W (0b00)
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PSRAM_VENDOR (BLOCK1) PSRAM vendor = 0 R/W (0b00)
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BLOCK_USR_DATA (BLOCK3) User data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_SYS_DATA2 (BLOCK9) System data part 2 (reserved)
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Flash fuses:
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FLASH_TYPE (BLOCK0) The type of interfaced flash. 0: four data lines; = False R/W (0b0)
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1: eight data lines
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FLASH_TPUW (BLOCK0) Represents the flash waiting time after power-up; = 0 R/W (0x0)
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in unit of ms. When the value less than 15; the wa
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iting time is the programmed value. Otherwise; the
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waiting time is 2 times the programmed value
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FORCE_SEND_RESUME (BLOCK0) Represents whether ROM code is forced to send a re = False R/W (0b0)
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sume command during SPI boot. 1: forced. 0:not for
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ced
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RECOVERY_BOOTLOADER_FLASH_SECTOR (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = 0 R/W (0x000)
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PMU_FLASH_POWEL_SEL (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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PMU_FLASH_POWEL_SEL_EN (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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Identity fuses:
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BOOTLOADER_ANTI_ROLLBACK_VERSION (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = 0 R/W (0x0)
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WAFER_VERSION_MINOR (BLOCK1) Minor chip version = 0 R/W (0x0)
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WAFER_VERSION_MAJOR (BLOCK1) Major chip version = 0 R/W (0b00)
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DISABLE_WAFER_VERSION_MAJOR (BLOCK1) Disables check of wafer version major = False R/W (0b0)
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DISABLE_BLK_VERSION_MAJOR (BLOCK1) Disables check of blk version major = False R/W (0b0)
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BLK_VERSION_MINOR (BLOCK1) BLK_VERSION_MINOR of BLOCK2 = 0 R/W (0b000)
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BLK_VERSION_MAJOR (BLOCK1) BLK_VERSION_MAJOR of BLOCK2 = 0 R/W (0b00)
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PKG_VERSION (BLOCK1) Package version = 0 R/W (0b000)
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OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Jtag fuses:
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JTAG_SEL_ENABLE (BLOCK0) Represents whether the selection between usb_to_jt = False R/W (0b0)
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ag and pad_to_jtag through strapping gpio15 when b
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oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
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equal to 0 is enabled or disabled. 1: enabled. 0:
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disabled
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SOFT_DIS_JTAG (BLOCK0) Represents whether JTAG is disabled in soft way. O = 0 R/W (0b000)
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dd number: disabled. Even number: enabled
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DIS_PAD_JTAG (BLOCK0) Represents whether JTAG is disabled in the hard wa = False R/W (0b0)
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y(permanently). 1: disabled. 0: enabled
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RE_ENABLE_JTAG_SOURCE (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
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Mac fuses:
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MAC (BLOCK1) MAC address
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= 00:00:00:00:00:00 (OK) R/W
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CUSTOM_MAC (BLOCK3) Custom MAC
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= 00:00:00:00:00:00 (OK) R/W
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Security fuses:
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DIS_FORCE_DOWNLOAD (BLOCK0) Represents whether the function that forces chip i = False R/W (0b0)
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nto download mode is disabled or enabled. 1: disab
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led. 0: enabled
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SPI_DOWNLOAD_MSPI_DIS (BLOCK0) Set this bit to disable accessing MSPI flash/MSPI = False R/W (0b0)
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ram by SYS AXI matrix during boot_mode_download
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DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Represents whether flash encrypt function is disab = False R/W (0b0)
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led or enabled(except in SPI boot mode). 1: disable
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ed. 0: enabled
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FORCE_USE_KEY_MANAGER_KEY (BLOCK0) Set each bit to control whether corresponding key = 0 R/W (0b00000)
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must come from key manager.. 1 is true; 0 is false
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. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
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FORCE_DISABLE_SW_INIT_KEY (BLOCK0) Set this bit to disable software written init key; = False R/W (0b0)
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and force use efuse_init_key
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KM_XTS_KEY_LENGTH_256 (BLOCK0) Set this bit to configure flash encryption use xts = False R/W (0b0)
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-128 key; else use xts-256 key
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SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
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and disables otherwise
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SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0)
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SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0)
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SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0)
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KEY_PURPOSE_0 (BLOCK0) Represents the purpose of Key0 = USER R/W (0b00000)
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KEY_PURPOSE_1 (BLOCK0) Represents the purpose of Key1 = USER R/W (0b00000)
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KEY_PURPOSE_2 (BLOCK0) Represents the purpose of Key2 = USER R/W (0b00000)
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KEY_PURPOSE_3 (BLOCK0) Represents the purpose of Key3 = USER R/W (0b00000)
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KEY_PURPOSE_4 (BLOCK0) Represents the purpose of Key4 = USER R/W (0b00000)
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ECDSA_ENABLE_SOFT_K (BLOCK0) Represents whether hardware random number k is for = False R/W (0b0)
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ced used in ESDCA. 1: force used. 0: not force use
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d
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SEC_DPA_LEVEL (BLOCK0) Represents the spa secure level by configuring the = 0 R/W (0b00)
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clock random divide mode
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XTS_DPA_CLK_ENABLE (BLOCK0) Represents the spa secure level by configuring the = False R/W (0b0)
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clock random divide mode
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XTS_DPA_PSEUDO_LEVEL (BLOCK0) Represents whether anti-dpa attack is enabled. 1:e = 0 R/W (0b00)
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nabled. 0: disabled
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SECURE_BOOT_EN (BLOCK0) Represents whether secure boot is enabled or disab = False R/W (0b0)
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led. 1: enabled. 0: disabled
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SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Represents whether revoking aggressive secure boot = False R/W (0b0)
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is enabled or disabled. 1: enabled. 0: disabled
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DIS_DOWNLOAD_MODE (BLOCK0) Represents whether Download mode is disabled or en = False R/W (0b0)
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abled. 1: disabled. 0: enabled
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LOCK_KM_KEY (BLOCK0) TBD = False R/W (0b0)
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ENABLE_SECURITY_DOWNLOAD (BLOCK0) Represents whether security download is enabled or = False R/W (0b0)
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disabled. 1: enabled. 0: disabled
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SECURE_VERSION (BLOCK0) Represents the version used by ESP-IDF anti-rollba = 0 R/W (0x0000)
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ck feature
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SECURE_BOOT_DISABLE_FAST_WAKE (BLOCK0) Represents whether FAST VERIFY ON WAKE is disabled = False R/W (0b0)
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or enabled when Secure Boot is enabled. 1: disable
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ed. 0: enabled
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SECURE_BOOT_SHA384_EN (BLOCK0) Represents whether secure boot is enabled or disab = False R/W (0b0)
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led. 1: enabled. 0: disabled
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BLOCK_KEY0 (BLOCK4)
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Purpose: USER
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Key0 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_KEY1 (BLOCK5)
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Purpose: USER
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Key1 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_KEY2 (BLOCK6)
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Purpose: USER
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Key2 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_KEY3 (BLOCK7)
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Purpose: USER
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Key3 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_KEY4 (BLOCK8)
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Purpose: USER
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Key4 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Usb fuses:
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DIS_USB_JTAG (BLOCK0) Represents whether the function of usb switch to j = False R/W (0b0)
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tag is disabled or enabled. 1: disabled. 0: enable
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d
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DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download via USB-OTG = False R/W (0b0)
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DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Represents whether print from USB-Serial-JTAG is d = False R/W (0b0)
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isabled or enabled. 1: disabled. 0: enabled
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DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Represents whether the USB-Serial-JTAG download fu = False R/W (0b0)
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nction is disabled or enabled. 1: disabled. 0: ena
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bled
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Wdt fuses:
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WDT_DELAY_SEL (BLOCK0) Represents whether RTC watchdog timeout threshold = 0 R/W (0b0)
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is selected at startup. 1: selected. 0: not select
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ed
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DIS_WDT (BLOCK0) Set this bit to disable watch dog = False R/W (0b0)
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@@ -1,3 +1,20 @@
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.. note::
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.. code-block:: none
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To be updated.
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idf.py efuse-dump
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Executing action: efuse-dump
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Running espefuse in directory <project-directory>
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Executing "espefuse dump --chip esp32s31"...
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espefuse v5.3.dev2
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=== Run "dump" command ===
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BLOCK0 ( ) [0 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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MAC_SPI_8M_0 (BLOCK1 ) [1 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK_SYS_DATA (BLOCK2 ) [2 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK_USR_DATA (BLOCK3 ) [3 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK_KEY0 (BLOCK4 ) [4 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK_KEY1 (BLOCK5 ) [5 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK_KEY2 (BLOCK6 ) [6 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK_KEY3 (BLOCK7 ) [7 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK_KEY4 (BLOCK8 ) [8 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK_SYS_DATA2 (BLOCK9 ) [9 ] dump: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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@@ -1,3 +1,231 @@
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.. note::
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.. code-block:: none
|
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|
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To be updated.
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$ ./efuse_table_gen.py -t {IDF_TARGET_PATH_NAME} {IDF_TARGET_PATH_NAME}/esp_efuse_table.csv --info
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Max number of bits in BLK 256
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Sorted efuse table:
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# field_name efuse_block bit_start bit_count
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1 WR_DIS EFUSE_BLK0 0 32
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2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
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3 WR_DIS.KM_RND_SWITCH_CYCLE EFUSE_BLK0 1 1
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4 WR_DIS.KM_DISABLE_DEPLOY_MODE EFUSE_BLK0 1 1
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5 WR_DIS.KM_DEPLOY_ONLY_ONCE EFUSE_BLK0 1 1
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6 WR_DIS.FORCE_USE_KEY_MANAGER_KEY EFUSE_BLK0 1 1
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7 WR_DIS.FORCE_DISABLE_SW_INIT_KEY EFUSE_BLK0 1 1
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8 WR_DIS.KM_XTS_KEY_LENGTH_256 EFUSE_BLK0 1 1
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9 WR_DIS.LOCK_KM_KEY EFUSE_BLK0 1 1
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10 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
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11 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
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12 WR_DIS.SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 2 1
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13 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
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14 WR_DIS.JTAG_SEL_ENABLE EFUSE_BLK0 2 1
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15 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
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16 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
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17 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 2 1
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18 WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 2 1
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19 WR_DIS.DIS_WDT EFUSE_BLK0 2 1
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20 WR_DIS.DIS_SWD EFUSE_BLK0 2 1
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21 WR_DIS.PMU_FLASH_POWER_SEL EFUSE_BLK0 2 1
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22 WR_DIS.PMU_FLASH_POWER_SEL_EN EFUSE_BLK0 2 1
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23 WR_DIS.POWER_GLITCH_EN EFUSE_BLK0 2 1
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24 WR_DIS.PVT_0_GLITCH_EN EFUSE_BLK0 3 1
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25 WR_DIS.PVT_0_GLITCH_MODE EFUSE_BLK0 3 1
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26 WR_DIS.PVT_1_GLITCH_EN EFUSE_BLK0 3 1
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27 WR_DIS.PVT_1_GLITCH_MODE EFUSE_BLK0 3 1
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28 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
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29 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
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30 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
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31 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
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32 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
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33 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
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34 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
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35 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
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36 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
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37 WR_DIS.DIS_SM_CRYPT EFUSE_BLK0 14 1
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38 WR_DIS.ECC_FORCE_CONST_TIME EFUSE_BLK0 14 1
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||||
39 WR_DIS.ECDSA_DISABLE_SOFT_K EFUSE_BLK0 14 1
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||||
40 WR_DIS.SEC_DPA_LEVEL EFUSE_BLK0 14 1
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||||
41 WR_DIS.XTS_DPA_CLK_ENABLE EFUSE_BLK0 14 1
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||||
42 WR_DIS.XTS_DPA_PSEUDO_LEVEL EFUSE_BLK0 14 1
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||||
43 WR_DIS.RMA_NONCE_ENA EFUSE_BLK0 14 1
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||||
44 WR_DIS.RMA_CHIP_INFO_SOURCE EFUSE_BLK0 14 1
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||||
45 WR_DIS.RMA_DISABLE_FAST_VEF EFUSE_BLK0 14 1
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||||
46 WR_DIS.ENA_XTS_SHADOW EFUSE_BLK0 14 1
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||||
47 WR_DIS.ENA_SPI_BOOT_CRYPT_SCRAMBLER EFUSE_BLK0 14 1
|
||||
48 WR_DIS.RE_ENABLE_JTAG_SOURCE EFUSE_BLK0 14 1
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||||
49 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
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||||
50 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
51 WR_DIS.FLASH_TYPE EFUSE_BLK0 18 1
|
||||
52 WR_DIS.DIS_USB_OTG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
53 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
54 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
55 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
|
||||
56 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
|
||||
57 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
58 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
59 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
60 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
61 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
62 WR_DIS.HUK_GEN_STATE EFUSE_BLK0 19 1
|
||||
63 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
64 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
65 WR_DIS.MAC_EXT EFUSE_BLK0 20 1
|
||||
66 WR_DIS.WAFER_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
67 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
68 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
69 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
70 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
71 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
72 WR_DIS.PSRAM_CAP EFUSE_BLK0 20 1
|
||||
73 WR_DIS.TEMP EFUSE_BLK0 20 1
|
||||
74 WR_DIS.PSRAM_VENDOR EFUSE_BLK0 20 1
|
||||
75 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
76 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
77 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
78 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
79 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
80 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
81 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
82 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
83 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
84 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
85 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 28 1
|
||||
86 WR_DIS.USB_DEVICE_EXCHG_PINS EFUSE_BLK0 28 1
|
||||
87 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
|
||||
88 RD_DIS EFUSE_BLK0 32 7
|
||||
89 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
90 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
91 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
92 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
93 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
94 DIS_USB_JTAG EFUSE_BLK0 42 1
|
||||
95 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
96 SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 45 1
|
||||
97 DIS_TWAI EFUSE_BLK0 46 1
|
||||
98 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
|
||||
99 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
100 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
101 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
102 HUK_GEN_STATE EFUSE_BLK0 55 5
|
||||
103 KM_RND_SWITCH_CYCLE EFUSE_BLK0 64 1
|
||||
104 KM_DISABLE_DEPLOY_MODE EFUSE_BLK0 66 5
|
||||
105 KM_DEPLOY_ONLY_ONCE EFUSE_BLK0 71 5
|
||||
106 FORCE_USE_KEY_MANAGER_KEY EFUSE_BLK0 76 5
|
||||
107 FORCE_DISABLE_SW_INIT_KEY EFUSE_BLK0 81 1
|
||||
108 KM_XTS_KEY_LENGTH_256 EFUSE_BLK0 82 1
|
||||
109 WDT_DELAY_SEL EFUSE_BLK0 83 1
|
||||
110 DIS_SM_CRYPT EFUSE_BLK0 84 1
|
||||
111 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 85 3
|
||||
112 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 88 1
|
||||
113 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 89 1
|
||||
114 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 90 1
|
||||
115 KEY_PURPOSE_0 EFUSE_BLK0 96 5
|
||||
116 KEY_PURPOSE_1 EFUSE_BLK0 101 5
|
||||
117 KEY_PURPOSE_2 EFUSE_BLK0 106 5
|
||||
118 KEY_PURPOSE_3 EFUSE_BLK0 111 5
|
||||
119 KEY_PURPOSE_4 EFUSE_BLK0 116 5
|
||||
120 ECC_FORCE_CONST_TIME EFUSE_BLK0 121 1
|
||||
121 ECDSA_DISABLE_SOFT_K EFUSE_BLK0 122 1
|
||||
122 SEC_DPA_LEVEL EFUSE_BLK0 123 2
|
||||
123 XTS_DPA_CLK_ENABLE EFUSE_BLK0 125 1
|
||||
124 XTS_DPA_PSEUDO_LEVEL EFUSE_BLK0 128 2
|
||||
125 SECURE_BOOT_EN EFUSE_BLK0 130 1
|
||||
126 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 131 1
|
||||
127 FLASH_TYPE EFUSE_BLK0 133 1
|
||||
128 DIS_USB_OTG_DOWNLOAD_MODE EFUSE_BLK0 137 1
|
||||
129 FLASH_TPUW EFUSE_BLK0 140 4
|
||||
130 DIS_DOWNLOAD_MODE EFUSE_BLK0 144 1
|
||||
131 DIS_DIRECT_BOOT EFUSE_BLK0 145 1
|
||||
132 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 146 1
|
||||
133 LOCK_KM_KEY EFUSE_BLK0 147 1
|
||||
134 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 148 1
|
||||
135 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 149 1
|
||||
136 UART_PRINT_CONTROL EFUSE_BLK0 150 2
|
||||
137 FORCE_SEND_RESUME EFUSE_BLK0 152 1
|
||||
138 SECURE_VERSION EFUSE_BLK0 160 16
|
||||
139 SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 176 1
|
||||
140 HYS_EN_PAD EFUSE_BLK0 177 1
|
||||
141 DCDC_VSET_EN EFUSE_BLK0 194 1
|
||||
142 DIS_WDT EFUSE_BLK0 195 1
|
||||
143 DIS_SWD EFUSE_BLK0 196 1
|
||||
144 SECURE_BOOT_SHA384_EN EFUSE_BLK0 203 1
|
||||
145 BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION EFUSE_BLK0 204 4
|
||||
146 BOOTLOADER_ANTI_ROLLBACK_EN EFUSE_BLK0 208 1
|
||||
147 BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM EFUSE_BLK0 209 1
|
||||
148 RECOVERY_BOOTLOADER_FLASH_SECTOR EFUSE_BLK0 210 12
|
||||
149 RMA_ENA EFUSE_BLK0 222 2
|
||||
150 RMA_SESSION_COUNTER EFUSE_BLK0 224 3
|
||||
151 RMA_NONCE_ENA EFUSE_BLK0 227 2
|
||||
152 RMA_CHIP_INFO_SOURCE EFUSE_BLK0 229 1
|
||||
153 RMA_DISABLE_FAST_VEF EFUSE_BLK0 230 1
|
||||
154 PVT_0_GLITCH_EN EFUSE_BLK0 231 1
|
||||
155 PVT_0_GLITCH_MODE EFUSE_BLK0 232 2
|
||||
156 PVT_1_GLITCH_EN EFUSE_BLK0 234 1
|
||||
157 PVT_1_GLITCH_MODE EFUSE_BLK0 235 2
|
||||
158 PMU_FLASH_POWER_SEL EFUSE_BLK0 237 1
|
||||
159 PMU_FLASH_POWER_SEL_EN EFUSE_BLK0 238 1
|
||||
160 POWER_GLITCH_EN EFUSE_BLK0 239 4
|
||||
161 ENA_XTS_SHADOW EFUSE_BLK0 243 1
|
||||
162 ENA_SPI_BOOT_CRYPT_SCRAMBLER EFUSE_BLK0 244 1
|
||||
163 RE_ENABLE_JTAG_SOURCE EFUSE_BLK0 245 1
|
||||
164 MAC EFUSE_BLK1 0 8
|
||||
165 MAC EFUSE_BLK1 8 8
|
||||
166 MAC EFUSE_BLK1 16 8
|
||||
167 MAC EFUSE_BLK1 24 8
|
||||
168 MAC EFUSE_BLK1 32 8
|
||||
169 MAC EFUSE_BLK1 40 8
|
||||
170 MAC_EXT EFUSE_BLK1 48 8
|
||||
171 MAC_EXT EFUSE_BLK1 56 8
|
||||
172 WAFER_VERSION_MINOR EFUSE_BLK1 114 4
|
||||
173 WAFER_VERSION_MAJOR EFUSE_BLK1 118 2
|
||||
174 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK1 120 1
|
||||
175 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK1 121 1
|
||||
176 BLK_VERSION_MINOR EFUSE_BLK1 122 3
|
||||
177 BLK_VERSION_MAJOR EFUSE_BLK1 125 2
|
||||
178 PSRAM_CAP EFUSE_BLK1 127 3
|
||||
179 TEMP EFUSE_BLK1 130 2
|
||||
180 PSRAM_VENDOR EFUSE_BLK1 132 2
|
||||
181 PKG_VERSION EFUSE_BLK1 134 2
|
||||
182 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
183 USER_DATA EFUSE_BLK3 0 256
|
||||
184 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
185 KEY0 EFUSE_BLK4 0 256
|
||||
186 KEY1 EFUSE_BLK5 0 256
|
||||
187 KEY2 EFUSE_BLK6 0 256
|
||||
188 KEY3 EFUSE_BLK7 0 256
|
||||
189 KEY4 EFUSE_BLK8 0 256
|
||||
190 SYS_DATA_PART2 EFUSE_BLK9 0 32
|
||||
191 USB_DEVICE_EXCHG_PINS EFUSE_BLK9 192 1
|
||||
|
||||
Used bits in efuse table:
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 1] [1 1] [1 1] ... [140 152] [160 177] [194 196] [203 245]
|
||||
|
||||
EFUSE_BLK1
|
||||
[0 63] [114 135]
|
||||
|
||||
EFUSE_BLK2
|
||||
[0 127]
|
||||
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK9
|
||||
[0 31] [192 192]
|
||||
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
|
||||
Reference in New Issue
Block a user