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feat(esp_hw_support): add api to gpio driver to support output internal clock on GPIO

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This commit is contained in:
wuzhenghui
2023-10-20 14:35:26 +08:00
parent 1f10c84a4f
commit 6a436286dc
33 changed files with 404 additions and 108 deletions
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components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
+4
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@@ -371,6 +371,10 @@ config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
hex
default 0x00000000003FFFC0
config SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8
components/soc/esp32c3/include/soc/clk_tree_defs.h
+10
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@@ -357,6 +357,16 @@ typedef enum {
LEDC_USE_RTC8M_CLK __attribute__((deprecated("please use 'LEDC_USE_RC_FAST_CLK' instead"))) = LEDC_USE_RC_FAST_CLK, /*!< Alias of 'LEDC_USE_RC_FAST_CLK' */
} soc_periph_ledc_clk_src_legacy_t;
//////////////////////////////////////////////CLOCK OUTPUT///////////////////////////////////////////////////////////
typedef enum {
CLKOUT_SIG_PLL = 1, /*!< PLL_CLK is the output of crystal oscillator frequency multiplier */
CLKOUT_SIG_RC_SLOW = 4, /*!< RC slow clock, depends on the RTC_CLK_SRC configuration */
CLKOUT_SIG_XTAL = 5, /*!< Main crystal oscillator clock */
CLKOUT_SIG_PLL_F80M = 13, /*!< From PLL, usually be 80MHz */
CLKOUT_SIG_RC_FAST = 14, /*!< RC fast clock, about 17.5MHz */
CLKOUT_SIG_INVALID = 0xFF,
} soc_clkout_sig_id_t;
#ifdef __cplusplus
}
#endif
components/soc/esp32c3/include/soc/clkout_channel.h
-12
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@@ -1,12 +0,0 @@
/*
* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _SOC_CLKOUT_CHANNEL_H
#define _SOC_CLKOUT_CHANNEL_H
// ESP32C3 CLKOUT signals has no corresponding iomux pins
#endif
components/soc/esp32c3/include/soc/soc_caps.h
+3
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@@ -174,6 +174,9 @@
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_21)
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000003FFFC0ULL
// The Clock Out singnal is route to the pin by GPIO matrix
#define SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX (1)
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */