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fix(intr_alloc): Fix ISR allocate methods in several drivers

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This commit is contained in:
Chen Chen
2025-11-24 10:52:33 +08:00
parent e6b82fa4a0
commit 6a211ccf28
45 changed files with 358 additions and 34 deletions
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components/hal/esp32h21/include/hal/ledc_ll.h
+14 -1
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@@ -35,6 +35,8 @@ extern "C" {
#define LEDC_LL_FRACTIONAL_BITS (8)
#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
#define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS
/// Get the mask of the fade end interrupt status register.
#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S)
// Channel tasks: ID, enable register and bit
#define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \
@@ -740,7 +742,6 @@ static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_m
*
* @param hw Beginning address of the peripheral registers
* @param speed_mode LEDC speed_mode, low-speed mode only
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
* @param intr_status The fade end interrupt status
*
* @return None
@@ -752,6 +753,18 @@ static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t
*intr_status = (value >> int_en_base) & 0xff;
}
/**
* @brief Get the address of the fade end interrupt status register.
*
* @param hw Beginning address of the peripheral registers
* @return Pointer to the fade end interrupt status register.
*/
static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw)
{
return &hw->int_st.val;
}
/**
* @brief Clear fade end interrupt status
*
components/hal/esp32h21/include/hal/uart_ll.h
+5
View File
@@ -336,6 +336,11 @@ FORCE_INLINE_ATTR uint32_t uart_ll_get_intsts_mask(uart_dev_t *hw)
return hw->int_st.val;
}
FORCE_INLINE_ATTR volatile void* uart_ll_get_intr_status_reg(uart_dev_t *hw)
{
return &hw->int_st.val;
}
/**
* @brief Clear the UART interrupt status based on the given mask.
*