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feat(esp_security): suppoer s31 security clock management

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This commit is contained in:
wuzhenghui
2026-06-10 21:20:04 +08:00
parent 322e4c265a
commit 69d548c8d1
28 changed files with 266 additions and 9 deletions
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components/esp_security/src/esp_crypto_periph_clk.c
+9
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@@ -8,6 +8,7 @@
#include "esp_private/esp_crypto_lock_internal.h"
#include "sdkconfig.h"
#include "esp_crypto_periph_clk.h"
#include "esp_crypto_clk.h"
#if SOC_AES_SUPPORTED
#include "hal/aes_ll.h"
@@ -48,6 +49,7 @@ int __DECLARE_RCC_ATOMIC_ENV __attribute__((unused));
void esp_crypto_aes_enable_periph_clk(bool enable)
{
AES_RCC_ATOMIC() {
esp_crypto_common_clk_enable(enable);
aes_ll_enable_bus_clock(enable);
if (enable) {
aes_ll_reset_register();
@@ -66,6 +68,7 @@ void esp_crypto_aes_enable_periph_clk(bool enable)
void esp_crypto_sha_enable_periph_clk(bool enable)
{
SHA_RCC_ATOMIC() {
esp_crypto_common_clk_enable(enable);
sha_ll_enable_bus_clock(enable);
if (enable) {
sha_ll_reset_register();
@@ -84,6 +87,7 @@ void esp_crypto_sha_enable_periph_clk(bool enable)
void esp_crypto_mpi_enable_periph_clk(bool enable)
{
MPI_RCC_ATOMIC() {
esp_crypto_common_clk_enable(enable);
mpi_ll_enable_bus_clock(enable);
if (enable) {
mpi_ll_power_up();
@@ -99,6 +103,7 @@ void esp_crypto_mpi_enable_periph_clk(bool enable)
void esp_crypto_ecc_enable_periph_clk(bool enable)
{
ECC_RCC_ATOMIC() {
esp_crypto_common_clk_enable(enable);
ecc_ll_enable_bus_clock(enable);
if (enable) {
ecc_ll_power_up();
@@ -114,6 +119,7 @@ void esp_crypto_ecc_enable_periph_clk(bool enable)
void esp_crypto_hmac_enable_periph_clk(bool enable)
{
HMAC_RCC_ATOMIC() {
esp_crypto_common_clk_enable(enable);
hmac_ll_enable_bus_clock(enable);
if (enable) {
hmac_ll_reset_register();
@@ -126,6 +132,7 @@ void esp_crypto_hmac_enable_periph_clk(bool enable)
void esp_crypto_ds_enable_periph_clk(bool enable)
{
DS_RCC_ATOMIC() {
esp_crypto_common_clk_enable(enable);
ds_ll_enable_bus_clock(enable);
if (enable) {
ds_ll_reset_register();
@@ -138,6 +145,7 @@ void esp_crypto_ds_enable_periph_clk(bool enable)
void esp_crypto_ecdsa_enable_periph_clk(bool enable)
{
ECDSA_RCC_ATOMIC() {
esp_crypto_common_clk_enable(enable);
ecdsa_ll_enable_bus_clock(enable);
if (enable) {
ecdsa_ll_reset_register();
@@ -150,6 +158,7 @@ void esp_crypto_ecdsa_enable_periph_clk(bool enable)
void esp_crypto_key_mgr_enable_periph_clk(bool enable)
{
KEY_MANAGER_RCC_ATOMIC() {
esp_crypto_common_clk_enable(enable);
key_mgr_ll_power_up();
key_mgr_ll_enable_bus_clock(enable);
key_mgr_ll_enable_peripheral_clock(enable);