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Revert "fix(rom): fixed esprv_int_set_threshold on C5"

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This reverts commit 171e0a21a1.
This commit is contained in:
Marius Vikhammer
2024-06-24 13:57:57 +08:00
committed by BOT
parent ce7393f67b
commit 69ab9d7a17
5 changed files with 3 additions and 16 deletions
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components/esp_rom/esp32c5/mp/esp32c5/Kconfig.soc_caps.in
-4
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@@ -82,7 +82,3 @@ config ESP_ROM_HAS_VERSION
config ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
bool
default y
config ESP_ROM_CLIC_INT_THRESH_PATCH
bool
default y
components/esp_rom/esp32c5/mp/esp32c5/esp_rom_caps.h
-1
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@@ -28,4 +28,3 @@
#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
#define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information
#define ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB (1) // ROM supports the HP core to jump to the RTC memory to execute stub code after waking up from deepsleep.
#define ESP_ROM_CLIC_INT_THRESH_PATCH (1) // ROM version of esprv_intc_int_set_threshold incorrectly assumes lowest MINTTHRESH is 0x1F, should be 0xF
components/esp_rom/esp32c5/mp/esp32c5/ld/esp32c5.rom.ld
+1
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@@ -276,6 +276,7 @@ gpio_pad_hold = 0x40000740;
/* Functions */
esprv_intc_int_set_priority = 0x40000744;
esprv_intc_int_set_threshold = 0x40000748;
esprv_intc_int_enable = 0x4000074c;
esprv_intc_int_disable = 0x40000750;
esprv_intc_int_set_type = 0x40000754;