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refactor(lpperi): improve compatibility solution

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laokaiyao
2025-01-15 17:02:34 +08:00
parent 4d11fe5847
commit 692ca37edf
10 changed files with 25 additions and 93 deletions
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8
components/esp_system/port/cpu_start.c
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@@ -53,7 +53,6 @@
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/cache.h"
#include "esp_memprot.h"
#include "soc/lpperi_struct.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/cache.h"
#include "esp32c2/rom/secure_boot.h"
@@ -453,13 +452,6 @@ void IRAM_ATTR call_start_cpu0(void)
}
#endif
#if CONFIG_IDF_TARGET_ESP32H2
// Some modules' register layout are not binary compatible among the different chip revisions,
// they will be wrapped into a new compatible instance which will point to the correct register address according to the revision.
// To ensure the compatible instance is initialized before used, the initialization is done after BBS is cleared
lpperi_compatible_reg_addr_init();
#endif
#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP && !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE && !SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
// It helps to fix missed cache settings for other cores. It happens when bootloader is unicore.
do_multicore_settings();