feat(phy): add check for required clock bits during phy enable

This commit is contained in:
liuning
2026-01-09 16:53:20 +08:00
committed by BOT
parent 9c9f884f3a
commit 675a977ac8
23 changed files with 212 additions and 1 deletions
@@ -197,6 +197,12 @@ static inline void modem_syscon_ll_clk_conf1_configure(modem_syscon_dev_t *hw, b
}
}
__attribute__((always_inline))
static inline uint32_t modem_syscon_ll_clk_conf1_get(modem_syscon_dev_t *hw)
{
return hw->clk_conf1.val;
}
__attribute__((always_inline))
static inline void modem_syscon_ll_enable_fe_16m_clock(modem_syscon_dev_t *hw, bool en)
{