Whitespace: Automated whitespace fixes (large commit)

Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)

components/hal/esp32s3/include/hal/adc_hal.h

@@ -259,4 +259,4 @@ uint32_t adc_hal_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atte
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/adc_hal_conf.h

@@ -28,4 +28,4 @@
 
 #define SOC_ADC_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) ((PERIPH_NUM==0)? 2 : 1)
 
-#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT     (1)
+#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT     (1)

components/hal/esp32s3/include/hal/adc_ll.h

@@ -1177,4 +1177,4 @@ static inline void adc_ll_vref_output(adc_ll_num_t adc, adc_channel_t channel, b
 }
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/gpio_ll.h

@@ -422,4 +422,4 @@ static inline void gpio_ll_force_unhold_all(gpio_dev_t *hw)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/i2c_ll.h

@@ -859,4 +859,3 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw)
 #ifdef __cplusplus
 }
 #endif
-

components/hal/esp32s3/include/hal/interrupt_controller_ll.h

@@ -12,7 +12,7 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#pragma once 
+#pragma once
 
 #include <stdint.h>
 #include "soc/soc_caps.h"
@@ -25,18 +25,18 @@ extern "C" {
 
 /**
  * @brief enable interrupts specified by the mask
- * 
- * @param mask bitmask of interrupts that needs to be enabled 
+ *
+ * @param mask bitmask of interrupts that needs to be enabled
  */
-static inline void intr_cntrl_ll_enable_interrupts(uint32_t mask) 
+static inline void intr_cntrl_ll_enable_interrupts(uint32_t mask)
 {
     xt_ints_on(mask);
 }
 
 /**
  * @brief disable interrupts specified by the mask
- * 
- * @param mask bitmask of interrupts that needs to be disabled 
+ *
+ * @param mask bitmask of interrupts that needs to be disabled
  */
 static inline void intr_cntrl_ll_disable_interrupts(uint32_t mask)
 {
@@ -45,10 +45,10 @@ static inline void intr_cntrl_ll_disable_interrupts(uint32_t mask)
 
 /**
  * @brief checks if given interrupt number has a valid handler
- * 
+ *
  * @param intr interrupt number ranged from 0 to 31
  * @param cpu cpu number ranged betweeen 0 to SOC_CPU_CORES_NUM - 1
- * @return true for valid handler, false otherwise 
+ * @return true for valid handler, false otherwise
  */
 static inline bool intr_cntrl_ll_has_handler(uint8_t intr, uint8_t cpu)
 {
@@ -56,8 +56,8 @@ static inline bool intr_cntrl_ll_has_handler(uint8_t intr, uint8_t cpu)
 }
 
 /**
- * @brief sets interrupt handler and optional argument of a given interrupt number 
- * 
+ * @brief sets interrupt handler and optional argument of a given interrupt number
+ *
  * @param intr interrupt number ranged from 0 to 31
  * @param handler handler invoked when an interrupt occurs
  * @param arg optional argument to pass to the handler
@@ -68,10 +68,10 @@ static inline void intr_cntrl_ll_set_int_handler(uint8_t intr, interrupt_handler
 }
 
 /**
- * @brief Gets argument passed to handler of a given interrupt number 
- * 
+ * @brief Gets argument passed to handler of a given interrupt number
+ *
  * @param intr interrupt number ranged from 0 to 31
- * 
+ *
  * @return argument used by handler of passed interrupt number
  */
 static inline void * intr_cntrl_ll_get_int_handler_arg(uint8_t intr)
@@ -81,18 +81,18 @@ static inline void * intr_cntrl_ll_get_int_handler_arg(uint8_t intr)
 
 /**
  * @brief Disables interrupts that are not located in iram
- * 
+ *
  * @param newmask mask of interrupts needs to be disabled
  * @return oldmask where to store old interrupts state
  */
-static inline uint32_t intr_cntrl_ll_disable_int_mask(uint32_t newmask) 
+static inline uint32_t intr_cntrl_ll_disable_int_mask(uint32_t newmask)
 {
     return xt_int_disable_mask(newmask);
 }
 
 /**
  * @brief Enables interrupts that are not located in iram
- * 
+ *
  * @param newmask mask of interrupts needs to be disabled
  */
 static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask)
@@ -102,4 +102,4 @@ static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/ledc_ll.h

@@ -515,4 +515,4 @@ static inline void ledc_ll_get_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_m
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/mcpwm_ll.h

@@ -732,4 +732,4 @@ static inline mcpwm_intr_t mcpwm_ll_get_cap_intr_def(int bit)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/mpu_ll.h

@@ -59,4 +59,4 @@ static inline void mpu_ll_set_region_illegal(uint32_t addr)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/pcnt_ll.h

@@ -343,4 +343,4 @@ static inline void pcnt_ll_filter_disable(pcnt_dev_t *hw, pcnt_unit_t unit)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/rtc_cntl_ll.h

@@ -55,4 +55,4 @@ static inline void rtc_cntl_ll_ulp_wakeup_enable(void)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/rtc_io_ll.h

@@ -364,4 +364,4 @@ static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/sigmadelta_ll.h

@@ -70,4 +70,4 @@ static inline void sigmadelta_ll_set_prescale(gpio_sd_dev_t *hw, sigmadelta_chan
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/soc_ll.h

@@ -51,4 +51,4 @@ static inline void soc_ll_reset_core(int core)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/spi_flash_ll.h

@@ -105,4 +105,4 @@ typedef union  {
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/spi_ll.h

@@ -148,7 +148,7 @@ static inline void spi_ll_slave_init(spi_dev_t *hw)
 
 /**
  * Initialize SPI peripheral (slave half duplex mode)
- * 
+ *
  * @param hw Beginning address of the peripheral registers.
  */
 static inline void spi_ll_slave_hd_init(spi_dev_t *hw)
@@ -158,7 +158,7 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw)
     hw->ctrl.val = 0;
     hw->user.doutdin = 0;
     hw->user.sio = 0;
-    
+
     hw->slave.soft_reset = 1;
     hw->slave.soft_reset = 0;
     hw->slave.slave_mode = 1;
@@ -246,7 +246,7 @@ static inline void spi_ll_dma_fifo_reset(spi_dev_t *hw)
 
 /**
  * Clear in fifo full error
- * 
+ *
  * @param hw Beginning address of the peripheral registers.
  */
 static inline void spi_ll_infifo_full_clr(spi_dev_t *hw)
@@ -256,7 +256,7 @@ static inline void spi_ll_infifo_full_clr(spi_dev_t *hw)
 
 /**
  * Clear out fifo empty error
- * 
+ *
  * @param hw Beginning address of the peripheral registers.
  */
 static inline void spi_ll_outfifo_empty_clr(spi_dev_t *hw)
@@ -293,7 +293,7 @@ static inline void spi_ll_dma_tx_enable(spi_dev_t *hw, bool enable)
  * Configuration of RX DMA EOF interrupt generation way
  *
  * @param hw     Beginning address of the peripheral registers.
- * @param enable 1: spi_dma_inlink_eof is set when the number of dma pushed data bytes is equal to the value of spi_slv/mst_dma_rd_bytelen[19:0] in spi dma transition.  0: spi_dma_inlink_eof is set by spi_trans_done in non-seg-trans or spi_dma_seg_trans_done in seg-trans. 
+ * @param enable 1: spi_dma_inlink_eof is set when the number of dma pushed data bytes is equal to the value of spi_slv/mst_dma_rd_bytelen[19:0] in spi dma transition.  0: spi_dma_inlink_eof is set by spi_trans_done in non-seg-trans or spi_dma_seg_trans_done in seg-trans.
  */
 static inline void spi_ll_dma_set_rx_eof_generation(spi_dev_t *hw, bool enable)
 {
@@ -322,7 +322,7 @@ static inline void spi_ll_write_buffer(spi_dev_t *hw, const uint8_t *buffer_to_s
 
 /**
  * Write to SPI hardware data buffer by buffer ID (address)
- * 
+ *
  * @param hw      Beginning address of the peripheral registers
  * @param byte_id Start ID (address) of the hardware buffer to be written
  * @param data    Address of the data to be written to the hardware data buffer.
@@ -373,7 +373,7 @@ static inline void spi_ll_read_buffer(spi_dev_t *hw, uint8_t *buffer_to_rcv, siz
 
 /**
  * Read from SPI hardware data buffer by buffer ID (address)
- * 
+ *
  * @param hw      Beginning address of the peripheral registers
  * @param byte_id Start ID (address) of the hardware buffer to be read
  * @param data    Address of a buffer to read data from hardware data buffer
@@ -555,7 +555,7 @@ static inline void spi_ll_master_set_io_mode(spi_dev_t *hw, spi_ll_io_mode_t io_
 
 /**
  * Set the SPI slave to work in segment transaction mode
- * 
+ *
  * @param hw        Beginning address of the peripheral registers.
  * @param seg_trans True to work in seg mode, otherwise false.
  */

components/hal/esp32s3/include/hal/touch_sensor_hal.h

@@ -610,4 +610,4 @@ void touch_hal_sleep_channel_enable(touch_pad_t pad_num, bool enable);
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/touch_sensor_ll.h

@@ -1158,4 +1158,4 @@ static inline void touch_ll_get_wakeup_status(touch_pad_t *pad_num)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/include/hal/uart_ll.h

@@ -802,4 +802,4 @@ static inline uint16_t uart_ll_max_tout_thrd(uart_dev_t *hw)
 
 #ifdef __cplusplus
 }
-#endif
+#endif

components/hal/esp32s3/interrupt_descriptor_table.c

@@ -69,7 +69,7 @@ const static int_desc_t interrupt_descriptor_table [32]={
     { 5, INTTP_LEVEL, {INTDESC_RESVD,  INTDESC_RESVD } }, //31
 };
 
-const int_desc_t *interrupt_controller_hal_desc_table(void) 
+const int_desc_t *interrupt_controller_hal_desc_table(void)
 {
     return interrupt_descriptor_table;
-}
+}