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gdma: fix potential unaligned cache writeback issue

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This commit is contained in:
Armando
2023-02-28 10:42:22 +08:00
parent 1ecd1e3bf0
commit 663e881868
3 changed files with 4 additions and 6 deletions
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components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
-4
View File
@@ -363,10 +363,6 @@ config SOC_GDMA_SUPPORT_PSRAM
bool
default y
config SOC_GDMA_PSRAM_MIN_ALIGN
int
default 16
config SOC_GPIO_PORT
int
default 1
components/soc/esp32s3/include/soc/soc_caps.h
-1
View File
@@ -145,7 +145,6 @@
#define SOC_GDMA_GROUPS (1) // Number of GDMA groups
#define SOC_GDMA_PAIRS_PER_GROUP (5) // Number of GDMA pairs in each group
#define SOC_GDMA_SUPPORT_PSRAM (1) // GDMA can access external PSRAM
#define SOC_GDMA_PSRAM_MIN_ALIGN (16) // Minimal alignment for PSRAM transaction
/*-------------------------- GPIO CAPS ---------------------------------------*/
// ESP32-S3 has 1 GPIO peripheral