From 6618558e7b4b3b002093dbc9360f1b845865ec76 Mon Sep 17 00:00:00 2001 From: "harshal.patil" Date: Thu, 30 Jul 2026 02:06:55 +0530 Subject: [PATCH] refactor(esp_system): deduplicate ROM fast wake RTC digest reservation The digest length and the condition that reserves it at the end of RTC RAM were duplicated in seven places. Hold the reservation in a hidden Kconfig value that is zero when the feature does not apply, so every consumer subtracts it unconditionally, and derive ESP_SECURE_BOOT_DIGEST_LEN from it. --- components/bootloader/Kconfig.projbuild | 21 +++++++++++++++++++ .../include/esp_secure_boot.h | 2 +- .../src/bootloader_common_loader.c | 20 +++++++++--------- .../esp_system/ld/esp32c3/sections.ld.in | 9 ++++++++ .../esp_system/ld/esp32c5/sections.ld.in | 9 ++++++++ .../esp_system/ld/esp32c6/sections.ld.in | 9 ++++++++ .../esp_system/ld/esp32h2/sections.ld.in | 9 ++++++++ .../esp_system/ld/esp32s2/sections.ld.in | 9 ++++++++ .../esp_system/ld/esp32s3/sections.ld.in | 9 ++++++++ components/esp_system/ld/ld.common | 15 ++++--------- components/heap/port/esp32c5/memory_layout.c | 15 +------------ components/heap/port/esp32c6/memory_layout.c | 14 +------------ components/heap/port/esp32h2/memory_layout.c | 14 +------------ 13 files changed, 93 insertions(+), 62 deletions(-) diff --git a/components/bootloader/Kconfig.projbuild b/components/bootloader/Kconfig.projbuild index f22e61134c9..a020a1887a0 100644 --- a/components/bootloader/Kconfig.projbuild +++ b/components/bootloader/Kconfig.projbuild @@ -650,6 +650,27 @@ menu "Security features" endchoice + config SECURE_BOOT_IMAGE_DIGEST_LEN + int + default 48 if SECURE_BOOT_ECDSA_KEY_LEN_384_BITS + default 32 + help + Length in bytes of the application image digest used by Secure Boot V2. + Kept in sync with ESP_SECURE_BOOT_DIGEST_LEN in esp_secure_boot.h, and + usable from linker scripts and from components that cannot depend on + bootloader_support. + + config SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE + int + default SECURE_BOOT_IMAGE_DIGEST_LEN if SECURE_BOOT && ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP + default 0 + help + Number of bytes that must be left untouched at the end of RTC/LP RAM for + the ROM secure boot fast wake up feature, which stores the digest of the + verified application image there and re-checks it on deep sleep wake up. + Zero when the feature is not applicable, so that consumers can subtract + this value unconditionally. + config SECURE_SIGNED_ON_BOOT_NO_SECURE_BOOT bool "Bootloader verifies app signatures" default n diff --git a/components/bootloader_support/include/esp_secure_boot.h b/components/bootloader_support/include/esp_secure_boot.h index 93d2ac3dd31..b38a1b5a7ba 100644 --- a/components/bootloader_support/include/esp_secure_boot.h +++ b/components/bootloader_support/include/esp_secure_boot.h @@ -52,7 +52,7 @@ extern "C" { Can be compiled as part of app or bootloader code. */ -#define ESP_SECURE_BOOT_DIGEST_LEN 32 +#define ESP_SECURE_BOOT_DIGEST_LEN CONFIG_SECURE_BOOT_IMAGE_DIGEST_LEN #if CONFIG_IDF_TARGET_ESP32C2 #define ESP_SECURE_BOOT_KEY_DIGEST_LEN 16 diff --git a/components/bootloader_support/src/bootloader_common_loader.c b/components/bootloader_support/src/bootloader_common_loader.c index 24af321283e..212af543571 100644 --- a/components/bootloader_support/src/bootloader_common_loader.c +++ b/components/bootloader_support/src/bootloader_common_loader.c @@ -13,9 +13,6 @@ #include "esp_rom_crc.h" #include "esp_rom_gpio.h" #include "esp_flash_partitions.h" -#if CONFIG_SECURE_BOOT -#include "esp_secure_boot.h" -#endif #include "bootloader_flash.h" #include "bootloader_common.h" #include "soc/gpio_periph.h" @@ -34,6 +31,14 @@ #define IS_FIELD_SET(rev_full) (((rev_full) != 65535) && ((rev_full) != 0)) #define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1)) +#if ESP_ROM_HAS_LP_ROM && CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE > 0 +#error "Retain mem is placed at the start of RTC RAM on this target, while the ROM keeps the secure boot fast wake up digest at the end of it. The layout needs to be re-evaluated." +#endif + +#if CONFIG_SECURE_BOOT && ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP && CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE == 0 +#error "esp_rom_caps.h advertises ROM secure boot fast wake up support that Kconfig.soc_caps.in does not, so the digest area is left unreserved." +#endif + static const char* TAG = "boot_comm"; uint32_t bootloader_common_ota_select_crc(const esp_ota_select_entry_t *s) @@ -257,13 +262,8 @@ rtc_retain_mem_t* bootloader_common_get_rtc_retain_mem(void) #define RTC_RETAIN_MEM_ADDR (SOC_RTC_DRAM_HIGH - RETAIN_MEM_SIZE) #endif //ESP_ROM_HAS_LP_ROM -#if CONFIG_SECURE_BOOT && ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP - /* ROM stores the verified image digest in the last ESP_SECURE_BOOT_DIGEST_LEN - * bytes of LP/RTC RAM on deep-sleep wake. Keep retain mem below that region. */ - static rtc_retain_mem_t *const s_bootloader_retain_mem = (rtc_retain_mem_t *)((uintptr_t)RTC_RETAIN_MEM_ADDR - ESP_SECURE_BOOT_DIGEST_LEN); -#else - static rtc_retain_mem_t *const s_bootloader_retain_mem = (rtc_retain_mem_t *)RTC_RETAIN_MEM_ADDR; -#endif + static rtc_retain_mem_t *const s_bootloader_retain_mem = + (rtc_retain_mem_t *)(RTC_RETAIN_MEM_ADDR - CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE); return s_bootloader_retain_mem; #else static __attribute__((section(".bootloader_data_rtc_mem"))) rtc_retain_mem_t s_bootloader_retain_mem; diff --git a/components/esp_system/ld/esp32c3/sections.ld.in b/components/esp_system/ld/esp32c3/sections.ld.in index 195f55548b1..5b937f43814 100644 --- a/components/esp_system/ld/esp32c3/sections.ld.in +++ b/components/esp_system/ld/esp32c3/sections.ld.in @@ -128,10 +128,19 @@ SECTIONS *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + _bootloader_data_rtc_mem_end = ABSOLUTE(.); + /* ROM keeps the verified image digest in the last bytes of RTC RAM */ + . = . + CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE; _rtc_reserved_end = ABSOLUTE(.); } > rtc_reserved_seg +#if CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE > 0 + ASSERT((_bootloader_data_rtc_mem_end == ORIGIN(rtc_reserved_seg) + LENGTH(rtc_reserved_seg) + - CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE), + "The ROM secure boot fast wake up digest must occupy the last bytes of RTC RAM, and the bootloader retain mem must end where it begins. bootloader_common_get_rtc_retain_mem() computes that address.") +#endif + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), "RTC reserved segment data does not fit.") diff --git a/components/esp_system/ld/esp32c5/sections.ld.in b/components/esp_system/ld/esp32c5/sections.ld.in index 7acf239d242..ee0ec99ae68 100644 --- a/components/esp_system/ld/esp32c5/sections.ld.in +++ b/components/esp_system/ld/esp32c5/sections.ld.in @@ -130,10 +130,19 @@ SECTIONS *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + _bootloader_data_rtc_mem_end = ABSOLUTE(.); + /* ROM keeps the verified image digest in the last bytes of RTC RAM */ + . = . + CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE; _rtc_reserved_end = ABSOLUTE(.); } > rtc_reserved_seg +#if CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE > 0 + ASSERT((_bootloader_data_rtc_mem_end == ORIGIN(rtc_reserved_seg) + LENGTH(rtc_reserved_seg) + - CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE), + "The ROM secure boot fast wake up digest must occupy the last bytes of RTC RAM, and the bootloader retain mem must end where it begins. bootloader_common_get_rtc_retain_mem() computes that address.") +#endif + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), "RTC reserved segment data does not fit.") diff --git a/components/esp_system/ld/esp32c6/sections.ld.in b/components/esp_system/ld/esp32c6/sections.ld.in index da8a695be4a..4d66097b1a7 100644 --- a/components/esp_system/ld/esp32c6/sections.ld.in +++ b/components/esp_system/ld/esp32c6/sections.ld.in @@ -130,10 +130,19 @@ SECTIONS *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + _bootloader_data_rtc_mem_end = ABSOLUTE(.); + /* ROM keeps the verified image digest in the last bytes of RTC RAM */ + . = . + CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE; _rtc_reserved_end = ABSOLUTE(.); } > rtc_reserved_seg +#if CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE > 0 + ASSERT((_bootloader_data_rtc_mem_end == ORIGIN(rtc_reserved_seg) + LENGTH(rtc_reserved_seg) + - CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE), + "The ROM secure boot fast wake up digest must occupy the last bytes of RTC RAM, and the bootloader retain mem must end where it begins. bootloader_common_get_rtc_retain_mem() computes that address.") +#endif + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), "RTC reserved segment data does not fit.") diff --git a/components/esp_system/ld/esp32h2/sections.ld.in b/components/esp_system/ld/esp32h2/sections.ld.in index 5fb84f6b3b0..09f067a8338 100644 --- a/components/esp_system/ld/esp32h2/sections.ld.in +++ b/components/esp_system/ld/esp32h2/sections.ld.in @@ -130,10 +130,19 @@ SECTIONS *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + _bootloader_data_rtc_mem_end = ABSOLUTE(.); + /* ROM keeps the verified image digest in the last bytes of RTC RAM */ + . = . + CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE; _rtc_reserved_end = ABSOLUTE(.); } > rtc_reserved_seg +#if CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE > 0 + ASSERT((_bootloader_data_rtc_mem_end == ORIGIN(rtc_reserved_seg) + LENGTH(rtc_reserved_seg) + - CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE), + "The ROM secure boot fast wake up digest must occupy the last bytes of RTC RAM, and the bootloader retain mem must end where it begins. bootloader_common_get_rtc_retain_mem() computes that address.") +#endif + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), "RTC reserved segment data does not fit.") diff --git a/components/esp_system/ld/esp32s2/sections.ld.in b/components/esp_system/ld/esp32s2/sections.ld.in index 67099c272f6..dc7700676b0 100644 --- a/components/esp_system/ld/esp32s2/sections.ld.in +++ b/components/esp_system/ld/esp32s2/sections.ld.in @@ -151,10 +151,19 @@ SECTIONS *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + _bootloader_data_rtc_mem_end = ABSOLUTE(.); + /* ROM keeps the verified image digest in the last bytes of RTC RAM */ + . = . + CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE; _rtc_reserved_end = ABSOLUTE(.); } > rtc_reserved_seg +#if CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE > 0 + ASSERT((_bootloader_data_rtc_mem_end == ORIGIN(rtc_reserved_seg) + LENGTH(rtc_reserved_seg) + - CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE), + "The ROM secure boot fast wake up digest must occupy the last bytes of RTC RAM, and the bootloader retain mem must end where it begins. bootloader_common_get_rtc_retain_mem() computes that address.") +#endif + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), "RTC reserved segment data does not fit.") diff --git a/components/esp_system/ld/esp32s3/sections.ld.in b/components/esp_system/ld/esp32s3/sections.ld.in index 0c350742e7d..3d65dbec398 100644 --- a/components/esp_system/ld/esp32s3/sections.ld.in +++ b/components/esp_system/ld/esp32s3/sections.ld.in @@ -135,10 +135,19 @@ SECTIONS *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) + _bootloader_data_rtc_mem_end = ABSOLUTE(.); + /* ROM keeps the verified image digest in the last bytes of RTC RAM */ + . = . + CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE; _rtc_reserved_end = ABSOLUTE(.); } > rtc_reserved_seg +#if CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE > 0 + ASSERT((_bootloader_data_rtc_mem_end == ORIGIN(rtc_reserved_seg) + LENGTH(rtc_reserved_seg) + - CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE), + "The ROM secure boot fast wake up digest must occupy the last bytes of RTC RAM, and the bootloader retain mem must end where it begins. bootloader_common_get_rtc_retain_mem() computes that address.") +#endif + _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), "RTC reserved segment data does not fit.") diff --git a/components/esp_system/ld/ld.common b/components/esp_system/ld/ld.common index 7f88172fca5..1c595862fe8 100644 --- a/components/esp_system/ld/ld.common +++ b/components/esp_system/ld/ld.common @@ -11,13 +11,6 @@ /* CPU instruction prefetch padding size for flash mmap scenario */ #define _esp_flash_mmap_prefetch_pad_size 16 -/* Copy from esp_secure_boot.h */ -#ifdef CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS -#define ESP_SECURE_BOOT_DIGEST_LEN 48 -#else /* !CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */ -#define ESP_SECURE_BOOT_DIGEST_LEN 32 -#endif /* CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */ - /* * PMP region granularity size * Software may determine the PMP granularity by writing zero to pmp0cfg, then writing all ones @@ -76,11 +69,11 @@ /* RTC Reserved is placed before ULP memory, expand it to make sure the ULP start address has the required alignment */ #define ULP_ALIGNMENT_REQ_BYTES 256 - #define RESERVE_RTC_MEM ALIGN_UP(ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC, ULP_ALIGNMENT_REQ_BYTES) - #elif CONFIG_SECURE_BOOT && CONFIG_ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP - #define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC + ESP_SECURE_BOOT_DIGEST_LEN) + #define RESERVE_RTC_MEM ALIGN_UP(ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC \ + + CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE, ULP_ALIGNMENT_REQ_BYTES) #else - #define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC) + #define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC \ + + CONFIG_SECURE_BOOT_ROM_FAST_WAKE_RESERVE_SIZE) #endif #endif // SOC_RTC_MEM_SUPPORTED diff --git a/components/heap/port/esp32c5/memory_layout.c b/components/heap/port/esp32c5/memory_layout.c index 8286977672f..c5ed6f53a6b 100644 --- a/components/heap/port/esp32c5/memory_layout.c +++ b/components/heap/port/esp32c5/memory_layout.c @@ -11,7 +11,6 @@ #include "soc/soc.h" #include "heap_memory_layout.h" #include "esp_heap_caps.h" -#include "esp_rom_caps.h" /** * @brief Memory type descriptors. These describe the capabilities of a type of memory in the SoC. @@ -69,18 +68,6 @@ const size_t soc_memory_type_count = sizeof(soc_memory_types) / sizeof(soc_memor */ #define APP_USABLE_DRAM_END (SOC_ROM_STACK_START - SOC_ROM_STACK_SIZE) -#if CONFIG_SECURE_BOOT && ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP -#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS -#define ESP_SECURE_BOOT_DIGEST_LEN 48 -#else /* !CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */ -#define ESP_SECURE_BOOT_DIGEST_LEN 32 -#endif /* CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */ - -#define APP_USABLE_RTC_MEM_END (SOC_RTC_DATA_HIGH - ESP_SECURE_BOOT_DIGEST_LEN) -#else -#define APP_USABLE_RTC_MEM_END (SOC_RTC_DATA_HIGH) -#endif - const soc_memory_region_t soc_memory_regions[] = { #if CONFIG_SPIRAM { SOC_EXTRAM_DATA_LOW, (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW), SOC_MEMORY_TYPE_SPIRAM, 0, false}, //SPI SRAM, if available @@ -88,7 +75,7 @@ const soc_memory_region_t soc_memory_regions[] = { { SOC_DIRAM_DRAM_LOW, (APP_USABLE_DRAM_END - SOC_DIRAM_DRAM_LOW), SOC_MEMORY_TYPE_RAM, SOC_DIRAM_IRAM_LOW, false}, //D/IRAM, can be used as trace memory { APP_USABLE_DRAM_END, (SOC_DIRAM_DRAM_HIGH - APP_USABLE_DRAM_END), SOC_MEMORY_TYPE_RAM, APP_USABLE_DRAM_END, true}, //D/IRAM, can be used as trace memory (ROM reserved area) #ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP - { SOC_RTC_DATA_LOW, (APP_USABLE_RTC_MEM_END - SOC_RTC_DATA_LOW), SOC_MEMORY_TYPE_RTCRAM, 0, false}, //LPRAM + { SOC_RTC_DATA_LOW, (SOC_RTC_DATA_HIGH - SOC_RTC_DATA_LOW), SOC_MEMORY_TYPE_RTCRAM, 0, false}, //LPRAM #endif }; diff --git a/components/heap/port/esp32c6/memory_layout.c b/components/heap/port/esp32c6/memory_layout.c index 984cbf9fa15..4db427954a0 100644 --- a/components/heap/port/esp32c6/memory_layout.c +++ b/components/heap/port/esp32c6/memory_layout.c @@ -11,7 +11,6 @@ #include "soc/soc.h" #include "heap_memory_layout.h" #include "esp_heap_caps.h" -#include "esp_rom_caps.h" /** * @brief Memory type descriptors. These describe the capabilities of a type of memory in the SoC. @@ -67,17 +66,6 @@ const size_t soc_memory_type_count = sizeof(soc_memory_types) / sizeof(soc_memor */ #define APP_USABLE_DRAM_END (SOC_ROM_STACK_START - SOC_ROM_STACK_SIZE) -#if CONFIG_SECURE_BOOT && ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP -#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS -#define ESP_SECURE_BOOT_DIGEST_LEN 48 -#else /* !CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */ -#define ESP_SECURE_BOOT_DIGEST_LEN 32 -#endif /* CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */ -#define APP_USABLE_RTC_MEM_END (SOC_RTC_DATA_HIGH - ESP_SECURE_BOOT_DIGEST_LEN) -#else -#define APP_USABLE_RTC_MEM_END (SOC_RTC_DATA_HIGH) -#endif - const soc_memory_region_t soc_memory_regions[] = { { 0x40800000, 0x20000, SOC_MEMORY_TYPE_RAM, 0x40800000, false}, //D/IRAM level0, can be used as trace memory { 0x40820000, 0x20000, SOC_MEMORY_TYPE_RAM, 0x40820000, false}, //D/IRAM level1, can be used as trace memory @@ -85,7 +73,7 @@ const soc_memory_region_t soc_memory_regions[] = { { 0x40860000, (APP_USABLE_DRAM_END-0x40860000), SOC_MEMORY_TYPE_RAM, 0x40860000, false}, //D/IRAM level3, can be used as trace memory { APP_USABLE_DRAM_END, (SOC_DIRAM_DRAM_HIGH-APP_USABLE_DRAM_END), SOC_MEMORY_TYPE_RAM, APP_USABLE_DRAM_END, true}, //D/IRAM level3, can be used as trace memory (ROM reserved area) #ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP - { 0x50000000, (APP_USABLE_RTC_MEM_END - SOC_RTC_DATA_LOW), SOC_MEMORY_TYPE_RTCRAM, 0, false}, //LPRAM + { 0x50000000, (SOC_RTC_DATA_HIGH - SOC_RTC_DATA_LOW), SOC_MEMORY_TYPE_RTCRAM, 0, false}, //LPRAM #endif }; diff --git a/components/heap/port/esp32h2/memory_layout.c b/components/heap/port/esp32h2/memory_layout.c index ccf7690392a..0a5e8ce7940 100644 --- a/components/heap/port/esp32h2/memory_layout.c +++ b/components/heap/port/esp32h2/memory_layout.c @@ -11,7 +11,6 @@ #include "soc/soc.h" #include "heap_memory_layout.h" #include "esp_heap_caps.h" -#include "esp_rom_caps.h" /** * @brief Memory type descriptors. These describe the capabilities of a type of memory in the SoC. @@ -65,17 +64,6 @@ const size_t soc_memory_type_count = sizeof(soc_memory_types) / sizeof(soc_memor */ #define APP_USABLE_DRAM_END (SOC_ROM_STACK_START - SOC_ROM_STACK_SIZE) -#if CONFIG_SECURE_BOOT && ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP -#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS -#define ESP_SECURE_BOOT_DIGEST_LEN 48 -#else /* !CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */ -#define ESP_SECURE_BOOT_DIGEST_LEN 32 -#endif /* CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */ -#define APP_USABLE_RTC_MEM_END (SOC_RTC_DATA_HIGH - ESP_SECURE_BOOT_DIGEST_LEN) -#else -#define APP_USABLE_RTC_MEM_END (SOC_RTC_DATA_HIGH) -#endif - const soc_memory_region_t soc_memory_regions[] = { { 0x40800000, 0x10000, SOC_MEMORY_TYPE_RAM, 0x40800000, false}, //D/IRAM level 0 { 0x40810000, 0x10000, SOC_MEMORY_TYPE_RAM, 0x40810000, false}, //D/IRAM level 1 @@ -84,7 +72,7 @@ const soc_memory_region_t soc_memory_regions[] = { { 0x40840000, APP_USABLE_DRAM_END-0x40840000, SOC_MEMORY_TYPE_RAM, 0x40840000, false}, //D/IRAM level 4 { APP_USABLE_DRAM_END, (SOC_DIRAM_DRAM_HIGH-APP_USABLE_DRAM_END), SOC_MEMORY_TYPE_RAM, APP_USABLE_DRAM_END, true}, //D/IRAM level 4 #ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP - { 0x50000000, (APP_USABLE_RTC_MEM_END - SOC_RTC_DATA_LOW),SOC_MEMORY_TYPE_RTCRAM, 0, false}, //Fast RTC memory + { 0x50000000, (SOC_RTC_DATA_HIGH - SOC_RTC_DATA_LOW), SOC_MEMORY_TYPE_RTCRAM, 0, false}, //Fast RTC memory #endif };