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refactor(esp_common): centralize ALIGN_UP/ALIGN_DOWN into esp_macros.h

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Remove ~50 duplicate local definitions of ALIGN_UP/ALIGN_DOWN/ALIGN_UP_BY/
ALIGN_DOWN_BY across the codebase and replace them with canonical
ESP_ALIGN_UP/ESP_ALIGN_DOWN from esp_macros.h.
This commit is contained in:
morris
2026-07-06 13:36:06 +08:00
parent 2468defbff
commit 651d6a283f
66 changed files with 241 additions and 309 deletions
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components/esp_hw_support/lowpower/port/esp32s3/sleep_cpu.c
+5 -4
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@@ -15,6 +15,7 @@
#include "esp_ipc_isr.h"
#include "esp_sleep.h"
#include "esp_log.h"
#include "esp_macros.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_heap_caps.h"
@@ -66,7 +67,7 @@ static uint32_t cache_tagmem_retention_setup(uint32_t code_seg_vaddr, uint32_t c
index = (code_seg_vaddr / imode.cache_line_size) % sets;
waysgrp = imode.cache_ways >> 2;
code_seg_size = ALIGNUP(imode.cache_line_size, code_seg_size);
code_seg_size = ESP_ALIGN_UP(code_seg_size, imode.cache_line_size);
s_tag_mem->icache.start_point = index;
s_tag_mem->icache.size = (sets * waysgrp) & 0xff;
@@ -76,7 +77,7 @@ static uint32_t cache_tagmem_retention_setup(uint32_t code_seg_vaddr, uint32_t c
}
s_tag_mem->icache.enable = (code_seg_size != 0) ? 1 : 0;
icache_tagmem_blk_gs = s_tag_mem->icache.vld_size ? s_tag_mem->icache.vld_size : sets * waysgrp;
icache_tagmem_blk_gs = ALIGNUP(4, icache_tagmem_blk_gs);
icache_tagmem_blk_gs = ESP_ALIGN_UP(icache_tagmem_blk_gs, 4);
ESP_LOGD(TAG, "I-cache size:%"PRIu32" KiB, line size:%d B, ways:%d, sets:%"PRIu32", index:%"PRIu32", tag block groups:%"PRIu32"", (imode.cache_size>>10),
imode.cache_line_size, imode.cache_ways, sets, index, icache_tagmem_blk_gs);
@@ -86,7 +87,7 @@ static uint32_t cache_tagmem_retention_setup(uint32_t code_seg_vaddr, uint32_t c
index = (data_seg_vaddr / dmode.cache_line_size) % sets;
waysgrp = dmode.cache_ways >> 2;
data_seg_size = ALIGNUP(dmode.cache_line_size, data_seg_size);
data_seg_size = ESP_ALIGN_UP(data_seg_size, dmode.cache_line_size);
s_tag_mem->dcache.start_point = index;
s_tag_mem->dcache.size = (sets * waysgrp) & 0x1ff;
@@ -100,7 +101,7 @@ static uint32_t cache_tagmem_retention_setup(uint32_t code_seg_vaddr, uint32_t c
s_tag_mem->dcache.enable = 1;
#endif
dcache_tagmem_blk_gs = s_tag_mem->dcache.vld_size ? s_tag_mem->dcache.vld_size : sets * waysgrp;
dcache_tagmem_blk_gs = ALIGNUP(4, dcache_tagmem_blk_gs);
dcache_tagmem_blk_gs = ESP_ALIGN_UP(dcache_tagmem_blk_gs, 4);
ESP_LOGD(TAG, "D-cache size:%"PRIu32" KiB, line size:%d B, ways:%d, sets:%"PRIu32", index:%"PRIu32", tag block groups:%"PRIu32"", (dmode.cache_size>>10),
dmode.cache_line_size, dmode.cache_ways, sets, index, dcache_tagmem_blk_gs);