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docs: update PSRAM and flash encryption docs with per-page and separate key capabilities
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@@ -1663,6 +1663,18 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
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bool
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default y
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config SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE
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bool
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default y
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config SOC_PSRAM_ENCRYPTION_SEPARATE_KEY
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bool
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default y
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config SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE
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bool
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default y
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config SOC_UART_NUM
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int
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default 6
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@@ -634,6 +634,11 @@
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#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 /* SOC_EFUSE_XTS_AES_KEY_128 (1) || SOC_KEY_MANAGER_FE_KEY_DEPLOY_XTS_AES_128 (1) */
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#define SOC_FLASH_ENCRYPTION_XTS_AES_256 1 /* SOC_EFUSE_XTS_AES_KEY_256 (1) || SOC_KEY_MANAGER_FE_KEY_DEPLOY_XTS_AES_256 (1) */
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#define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND 1 /*!< Only available in chip version above 3.0 */
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#define SOC_FLASH_ENCRYPTION_PAGE_CONFIGURABLE 1 /* Flash encryption can be configured on a MMU page basis */
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/*-------------------------- PSRAM Encryption CAPS----------------------------*/
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#define SOC_PSRAM_ENCRYPTION_SEPARATE_KEY 1 /* PSRAM encryption can use independent key */
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#define SOC_PSRAM_ENCRYPTION_PAGE_CONFIGURABLE 1 /* PSRAM encryption can be configured on a MMU page basis */
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/*-------------------------- MEMPROT CAPS ------------------------------------*/
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