revert(esp_hw_support): esp32h4 beta5 i2c config retention when pd modem refer to PM-487

This commit is contained in:
hebinglin
2026-05-22 11:09:33 +08:00
parent 9c3a6b3f5d
commit 64bf345683
3 changed files with 3 additions and 22 deletions
@@ -32,14 +32,14 @@ esp_err_t sleep_clock_system_retention_init(void *arg)
#undef N_REGS_PCR
}
#if CONFIG_MAC_BB_PD || CONFIG_BT_CTRL_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE || SOC_PM_MODEM_CLK_CONF_RETENTION
#if CONFIG_MAC_BB_PD || CONFIG_BT_CTRL_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
esp_err_t sleep_clock_modem_retention_init(void *arg)
{
#define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_RF2_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1)
#define N_REGS_LPCON() (((MODEM_LPCON_MEM_CONF_REG - MODEM_LPCON_TEST_CONF_REG) / 4) + 1)
/* In ESP32H4, the I2C control registers, syscon is placed in the modem domain, lpcon is placed in the top domain,
and the BBPL requires I2C for calibration. This is the reason why the code for the BPLL enableq
and the BBPL requires I2C for calibration. This is the reason why the code for the BPLL enabled
section needs to be placed in this function.*/
const static sleep_retention_entries_config_t modem_regs_retention[] = {
/* SYSCON LPCON configuration retention */
@@ -69,9 +69,7 @@ bool clock_domain_pd_allowed(void)
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
* or off. The clock and reset of digital peripherals are managed through
* PCR, with TOP domain similar to MODEM domain. */
#if SOC_BLE_SUPPORTED || SOC_IEEE802154_SUPPORTED
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
#endif
#if SOC_BT_SUPPORTED
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
@@ -93,9 +91,6 @@ bool clock_domain_pd_allowed(void)
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
}
#endif
#if SOC_PM_MODEM_CLK_CONF_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
#endif
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
@@ -113,21 +108,12 @@ ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
};
sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM, &init_param);
#if CONFIG_MAC_BB_PD || CONFIG_BT_CTRL_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE || SOC_PM_MODEM_CLK_CONF_RETENTION
#if CONFIG_MAC_BB_PD || CONFIG_BT_CTRL_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
init_param = (sleep_retention_module_init_param_t) {
.cbs = { .create = { .handle = sleep_clock_modem_retention_init, .arg = NULL } },
#if !SOC_PM_MODEM_CLK_CONF_RETENTION
.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH
#endif
};
sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_MODEM, &init_param);
#endif
#if SOC_PM_MODEM_CLK_CONF_RETENTION
if (sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_CLOCK_MODEM) != ESP_OK) {
// even though the modem clock retention module create failed, sleep process can be executed without pd the modem domain, so just warning here
ESP_LOGW(TAG, "create retention link failed on modem clock, modem power domain won't be turned off during sleep");
}
#endif
return ESP_OK;
}