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revert(esp_hw_support): esp32h4 beta5 i2c config retention when pd modem refer to PM-487
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@@ -32,14 +32,14 @@ esp_err_t sleep_clock_system_retention_init(void *arg)
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#undef N_REGS_PCR
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}
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#if CONFIG_MAC_BB_PD || CONFIG_BT_CTRL_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE || SOC_PM_MODEM_CLK_CONF_RETENTION
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#if CONFIG_MAC_BB_PD || CONFIG_BT_CTRL_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
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esp_err_t sleep_clock_modem_retention_init(void *arg)
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{
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#define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_RF2_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1)
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#define N_REGS_LPCON() (((MODEM_LPCON_MEM_CONF_REG - MODEM_LPCON_TEST_CONF_REG) / 4) + 1)
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/* In ESP32H4, the I2C control registers, syscon is placed in the modem domain, lpcon is placed in the top domain,
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and the BBPL requires I2C for calibration. This is the reason why the code for the BPLL enableq
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and the BBPL requires I2C for calibration. This is the reason why the code for the BPLL enabled
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section needs to be placed in this function.*/
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const static sleep_retention_entries_config_t modem_regs_retention[] = {
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/* SYSCON LPCON configuration retention */
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@@ -69,9 +69,7 @@ bool clock_domain_pd_allowed(void)
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* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
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* or off. The clock and reset of digital peripherals are managed through
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* PCR, with TOP domain similar to MODEM domain. */
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#if SOC_BLE_SUPPORTED || SOC_IEEE802154_SUPPORTED
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sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
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#endif
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#if SOC_BT_SUPPORTED
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modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
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modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
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@@ -93,9 +91,6 @@ bool clock_domain_pd_allowed(void)
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if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
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mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
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}
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#endif
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#if SOC_PM_MODEM_CLK_CONF_RETENTION
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mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
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#endif
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const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
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const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
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@@ -113,21 +108,12 @@ ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
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};
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sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM, &init_param);
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#if CONFIG_MAC_BB_PD || CONFIG_BT_CTRL_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE || SOC_PM_MODEM_CLK_CONF_RETENTION
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#if CONFIG_MAC_BB_PD || CONFIG_BT_CTRL_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
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init_param = (sleep_retention_module_init_param_t) {
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.cbs = { .create = { .handle = sleep_clock_modem_retention_init, .arg = NULL } },
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#if !SOC_PM_MODEM_CLK_CONF_RETENTION
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.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH
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#endif
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};
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sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_MODEM, &init_param);
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#endif
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#if SOC_PM_MODEM_CLK_CONF_RETENTION
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if (sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_CLOCK_MODEM) != ESP_OK) {
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// even though the modem clock retention module create failed, sleep process can be executed without pd the modem domain, so just warning here
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ESP_LOGW(TAG, "create retention link failed on modem clock, modem power domain won't be turned off during sleep");
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}
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#endif
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return ESP_OK;
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}
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