diff --git a/components/hal/esp32h2/include/hal/parlio_ll.h b/components/hal/esp32h2/include/hal/parlio_ll.h
index f4938b1c4b0..0cb61a9c84f 100644
--- a/components/hal/esp32h2/include/hal/parlio_ll.h
+++ b/components/hal/esp32h2/include/hal/parlio_ll.h
@@ -248,8 +248,9 @@ static inline void parlio_ll_rx_start_soft_recv(parl_io_dev_t *dev, bool en)
  */
 static inline void parlio_ll_rx_set_sample_clock_edge(parl_io_dev_t *dev, parlio_sample_edge_t edge)
 {
-    dev->rx_clk_cfg.rx_clk_i_inv = edge;
-    dev->rx_clk_cfg.rx_clk_o_inv = edge;
+    bool invert = edge == PARLIO_SAMPLE_EDGE_NEG;
+    dev->rx_clk_cfg.rx_clk_i_inv = invert;
+    dev->rx_clk_cfg.rx_clk_o_inv = invert;
 }
 
 /**
@@ -489,8 +490,9 @@ static inline void parlio_ll_tx_treat_msb_as_valid(parl_io_dev_t *dev, bool en)
  */
 static inline void parlio_ll_tx_set_sample_clock_edge(parl_io_dev_t *dev, parlio_sample_edge_t edge)
 {
-    dev->tx_clk_cfg.tx_clk_i_inv = edge;
-    dev->tx_clk_cfg.tx_clk_o_inv = edge;
+    bool invert = edge == PARLIO_SAMPLE_EDGE_NEG;
+    dev->tx_clk_cfg.tx_clk_i_inv = invert;
+    dev->tx_clk_cfg.tx_clk_o_inv = invert;
 }
 
 /**
diff --git a/components/hal/esp32p4/include/hal/parlio_ll.h b/components/hal/esp32p4/include/hal/parlio_ll.h
index 21a543f995c..99b51d5e0d9 100644
--- a/components/hal/esp32p4/include/hal/parlio_ll.h
+++ b/components/hal/esp32p4/include/hal/parlio_ll.h
@@ -320,8 +320,9 @@ static inline void parlio_ll_rx_start_soft_recv(parl_io_dev_t *dev, bool en)
 __attribute__((always_inline))
 static inline void parlio_ll_rx_set_sample_clock_edge(parl_io_dev_t *dev, parlio_sample_edge_t edge)
 {
-    dev->rx_clk_cfg.rx_clk_i_inv = edge;
-    dev->rx_clk_cfg.rx_clk_o_inv = edge;
+    bool invert = edge == PARLIO_SAMPLE_EDGE_NEG;
+    dev->rx_clk_cfg.rx_clk_i_inv = invert;
+    dev->rx_clk_cfg.rx_clk_o_inv = invert;
 }
 
 /**
@@ -632,8 +633,9 @@ static inline void parlio_ll_tx_treat_msb_as_valid(parl_io_dev_t *dev, bool en)
  */
 static inline void parlio_ll_tx_set_sample_clock_edge(parl_io_dev_t *dev, parlio_sample_edge_t edge)
 {
-    dev->tx_clk_cfg.tx_clk_i_inv = edge;
-    dev->tx_clk_cfg.tx_clk_o_inv = edge;
+    bool invert = edge == PARLIO_SAMPLE_EDGE_NEG;
+    dev->tx_clk_cfg.tx_clk_i_inv = invert;
+    dev->tx_clk_cfg.tx_clk_o_inv = invert;
 }
 
 /**