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refactor(gpio): split GPIO HAL into separate component
cleaned up some includes in GPIO peripheral files
This commit is contained in:
Song Ruo Jing
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/*
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* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "soc/interrupts.h"
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#include "soc/soc_caps_full.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if SOC_HAS(DEDICATED_GPIO)
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// helper macros to access module attributes
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#define SOC_DEDIC_GPIO_ATTR(_attr) SOC_MODULE_ATTR(DEDIC_GPIO, _attr)
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typedef struct {
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const int irq; // Interrupt resource (-1 means no interrupt supported)
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struct {
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const int in_sig_per_channel[SOC_DEDIC_GPIO_ATTR(IN_CHANS_PER_CPU)];
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const int out_sig_per_channel[SOC_DEDIC_GPIO_ATTR(OUT_CHANS_PER_CPU)];
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} cores[SOC_CPU_CORES_NUM]; // Signals routed to/from GPIO matrix
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} dedic_gpio_signal_conn_t;
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extern const dedic_gpio_signal_conn_t dedic_gpio_periph_signals;
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#endif // SOC_HAS(DEDICATED_GPIO)
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#ifdef __cplusplus
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}
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#endif
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@@ -0,0 +1,561 @@
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/*
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*******************************************************************************
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* NOTICE
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* The hal is not public api, don't use in application code.
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* See readme.md in hal/include/hal/readme.md
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******************************************************************************/
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// The HAL layer for GPIO
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#pragma once
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#include "soc/soc_caps.h"
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#include "hal/gpio_ll.h"
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#include "hal/gpio_types.h"
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#include "soc/gpio_sig_map.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Get GPIO hardware instance with giving gpio num
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#define GPIO_HAL_GET_HW(num) GPIO_LL_GET_HW(num)
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/**
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* Context that should be maintained by both the driver and the HAL
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*/
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typedef struct {
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gpio_dev_t *dev;
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} gpio_hal_context_t;
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/**
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* @brief Get the configuration for an IO
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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* @param[out] out_io_config Pointer to the structure that saves the specific IO configuration
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*/
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#define gpio_hal_get_io_config(hal, gpio_num, out_io_config) gpio_ll_get_io_config((hal)->dev, gpio_num, out_io_config)
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/**
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* @brief Enable pull-up on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_pullup_en(hal, gpio_num) gpio_ll_pullup_en((hal)->dev, gpio_num)
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/**
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* @brief Disable pull-up on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_pullup_dis(hal, gpio_num) gpio_ll_pullup_dis((hal)->dev, gpio_num)
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/**
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* @brief Enable pull-down on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_pulldown_en(hal, gpio_num) gpio_ll_pulldown_en((hal)->dev, gpio_num)
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/**
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* @brief Disable pull-down on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_pulldown_dis(hal, gpio_num) gpio_ll_pulldown_dis((hal)->dev, gpio_num)
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/**
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* @brief GPIO set interrupt trigger type
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param intr_type Interrupt type, select from gpio_int_type_t
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*/
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#define gpio_hal_set_intr_type(hal, gpio_num, intr_type) gpio_ll_set_intr_type((hal)->dev, gpio_num, intr_type)
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/**
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* @brief Get GPIO interrupt status
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*
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* @param hal Context of the HAL layer
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* @param core_id interrupt core id
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* @param status interrupt status
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*/
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#define gpio_hal_get_intr_status(hal, core_id, status) gpio_ll_get_intr_status((hal)->dev, core_id, status)
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/**
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* @brief Get GPIO interrupt status high
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*
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* @param hal Context of the HAL layer
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* @param core_id interrupt core id
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* @param status interrupt status high
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*/
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#define gpio_hal_get_intr_status_high(hal, core_id, status) gpio_ll_get_intr_status_high((hal)->dev, core_id, status)
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/**
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* @brief Clear GPIO interrupt status bit
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number. If you want to clear the interrupt status bit of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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*/
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#define gpio_hal_clear_intr_status_bit(hal, gpio_num) (((gpio_num) < 32) ? gpio_ll_clear_intr_status((hal)->dev, 1 << gpio_num) \
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: gpio_ll_clear_intr_status_high((hal)->dev, 1 << (gpio_num - 32)))
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/**
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* @brief Enable GPIO module interrupt signal
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number. If you want to enable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param core_id Interrupt enabled CPU to corresponding ID
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*/
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void gpio_hal_intr_enable_on_core(gpio_hal_context_t *hal, uint32_t gpio_num, uint32_t core_id);
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/**
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* @brief Disable GPIO module interrupt signal
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number. If you want to disable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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*/
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void gpio_hal_intr_disable(gpio_hal_context_t *hal, uint32_t gpio_num);
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/**
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* @brief Disable input mode on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_input_disable(hal, gpio_num) gpio_ll_input_disable((hal)->dev, gpio_num)
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/**
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* @brief Enable input mode on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_input_enable(hal, gpio_num) gpio_ll_input_enable((hal)->dev, gpio_num)
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/**
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* @brief Disable output mode on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_output_disable(hal, gpio_num) gpio_ll_output_disable((hal)->dev, gpio_num)
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/**
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* @brief Enable output mode on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_output_enable(hal, gpio_num) gpio_ll_output_enable((hal)->dev, gpio_num)
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/**
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* @brief Configure the source of output enable signal for the pad (only takes effect if func sel is selected to be GPIO).
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
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* @param oen_inv True if the output enable needs to be inverted, otherwise False
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*/
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#define gpio_hal_set_output_enable_ctrl(hal, gpio_num, ctrl_by_periph, oen_inv) gpio_ll_set_output_enable_ctrl((hal)->dev, gpio_num, ctrl_by_periph, oen_inv)
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/**
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* @brief Disable open-drain mode on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_od_disable(hal, gpio_num) gpio_ll_od_disable((hal)->dev, gpio_num)
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/**
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* @brief Enable open-drain mode on GPIO.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_od_enable(hal, gpio_num) gpio_ll_od_enable((hal)->dev, gpio_num)
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/**
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* @brief Disconnect any peripheral output signal routed via GPIO matrix to the pin
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_matrix_out_default(hal, gpio_num) gpio_ll_set_output_signal_matrix_source((hal)->dev, gpio_num, SIG_GPIO_OUT_IDX, false)
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/**
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* @brief Select a function for the pin in the IOMUX
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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* @param func Function to assign to the pin
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*/
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#define gpio_hal_func_sel(hal, gpio_num, func) gpio_ll_func_sel((hal)->dev, gpio_num, func)
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/**
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* @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix
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*
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* @param hal Context of the HAL layer
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* @param in_sig_idx Peripheral signal index (tagged as input attribute)
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*
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* @return
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* - -1 Signal bypassed GPIO matrix
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* - Others GPIO number
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*/
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#define gpio_hal_get_in_signal_connected_io(hal, in_sig_idx) gpio_ll_get_in_signal_connected_io((hal)->dev, in_sig_idx)
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/**
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* @brief GPIO set output level
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number. If you want to set the output level of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param level Output level. 0: low ; 1: high
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*/
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#define gpio_hal_set_level(hal, gpio_num, level) gpio_ll_set_level((hal)->dev, gpio_num, level)
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/**
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* @brief GPIO get input level
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*
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* @warning If the pad is not configured for input (or input and output) the returned value is always 0.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number. If you want to get the logic level of e.g. pin GPIO16, gpio_num should be GPIO_NUM_16 (16);
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*
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* @return
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* - 0 the GPIO input level is 0
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* - 1 the GPIO input level is 1
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*/
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#define gpio_hal_get_level(hal, gpio_num) gpio_ll_get_level((hal)->dev, gpio_num)
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/**
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* @brief Enable GPIO wake-up function.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number.
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*/
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#define gpio_hal_wakeup_enable(hal, gpio_num) gpio_ll_wakeup_enable((hal)->dev, gpio_num)
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/**
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* @brief Disable GPIO wake-up function.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number
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*/
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#define gpio_hal_wakeup_disable(hal, gpio_num) gpio_ll_wakeup_disable((hal)->dev, gpio_num)
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/**
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* @brief Set GPIO pad drive capability
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number, only support output GPIOs
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* @param strength Drive capability of the pad
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*/
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#define gpio_hal_set_drive_capability(hal, gpio_num, strength) gpio_ll_set_drive_capability((hal)->dev, gpio_num, strength)
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/**
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* @brief Get GPIO pad drive capability
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number, only support output GPIOs
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* @param strength Pointer to accept drive capability of the pad
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*/
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#define gpio_hal_get_drive_capability(hal, gpio_num, strength) gpio_ll_get_drive_capability((hal)->dev, gpio_num, strength)
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/**
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* @brief Enable gpio pad hold function.
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*
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* The gpio pad hold function works in both input and output modes, but must be output-capable gpios.
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* If pad hold enabled:
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* in output mode: the output level of the pad will be force locked and can not be changed.
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* in input mode: the input value read will not change, regardless the changes of input signal.
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*
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* On ESP32/S2/C3/S3/C2, the state of digital gpio cannot be held during Deep-sleep, and it will resume the hold
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* function when the chip wakes up from Deep-sleep. If the digital gpio also needs to be held during Deep-sleep,
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* `gpio_deep_sleep_hold_en` should also be called.
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*
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* Power down or call gpio_hold_dis will disable this function.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number, only support output GPIOs
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*/
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#define gpio_hal_hold_en(hal, gpio_num) gpio_ll_hold_en((hal)->dev, gpio_num)
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/**
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* @brief Disable gpio pad hold function.
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*
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* When the chip is woken up from Deep-sleep, the gpio will be set to the default mode, so, the gpio will output
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* the default level if this function is called. If you don't want the level changes, the gpio should be configured to
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* a known state before this function is called.
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* e.g.
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* If you hold gpio18 high during Deep-sleep, after the chip is woken up and `gpio_hold_dis` is called,
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* gpio18 will output low level(because gpio18 is input mode by default). If you don't want this behavior,
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* you should configure gpio18 as output mode and set it to high level before calling `gpio_hold_dis`.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number, only support output GPIOs
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*/
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#define gpio_hal_hold_dis(hal, gpio_num) gpio_ll_hold_dis((hal)->dev, gpio_num)
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/**
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* @brief Get whether digital gpio pad is held
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number, only support output GPIOs
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*
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* @note digital io means io pad powered by VDD3P3_CPU or VDD_SPI
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* rtc io means io pad powered by VDD3P3_RTC
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* caller must ensure that gpio_num is a digital io pad
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*
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* @return
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* - true digital gpio pad is held
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* - false digital gpio pad is unheld
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*/
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#define gpio_hal_is_digital_io_hold(hal, gpio_num) gpio_ll_is_digital_io_hold((hal)->dev, gpio_num)
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#if !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
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/**
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* @brief Enable all digital gpio pad hold function during Deep-sleep.
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*
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* When the chip is in Deep-sleep mode, all digital gpio will hold the state before sleep, and when the chip is woken up,
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* the status of digital gpio will not be held. Note that the pad hold feature only works when the chip is in Deep-sleep mode,
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* when not in sleep mode, the digital gpio state can be changed even you have called this function.
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*
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* Power down or call gpio_hold_dis will disable this function, otherwise, the digital gpio hold feature works as long as the chip enter Deep-sleep.
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*
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* @param hal Context of the HAL layer
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*/
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#define gpio_hal_deep_sleep_hold_en(hal) gpio_ll_deep_sleep_hold_en((hal)->dev)
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/**
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* @brief Disable all digital gpio pad hold function during Deep-sleep.
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*
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* @param hal Context of the HAL layer
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*/
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#define gpio_hal_deep_sleep_hold_dis(hal) gpio_ll_deep_sleep_hold_dis((hal)->dev)
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/**
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* @brief Get whether all digital gpio pad hold function during Deep-sleep is enabled.
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*
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* @param hal Context of the HAL layer
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*
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* @return
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* - true deep sleep hold is enabled
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* - false deep sleep hold is disabled
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*/
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#define gpio_hal_deep_sleep_hold_is_en(hal) gpio_ll_deep_sleep_hold_is_en((hal)->dev)
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#endif //!SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
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/**
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* @brief Set pad input to a peripheral signal through the IOMUX.
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*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number of the pad.
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* @param func The index number of the IOMUX function to be selected for the pin.
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* One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
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* @param signal_idx Peripheral signal index to input. One of the ``*_IN_IDX`` signals in ``soc/gpio_sig_map.h``.
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*/
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void gpio_hal_iomux_in(gpio_hal_context_t *hal, uint32_t gpio_num, int func, uint32_t signal_idx);
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/**
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* @brief Set peripheral output to an GPIO pad through the IOMUX.
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||||
*
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* @param hal Context of the HAL layer
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* @param gpio_num GPIO number of the pad.
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* @param func The index number of the IOMUX function to be selected for the pin.
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* One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
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||||
*/
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void gpio_hal_iomux_out(gpio_hal_context_t *hal, uint32_t gpio_num, int func);
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||||
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/**
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* @brief Set pad input to a peripheral signal through the GPIO matrix.
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||||
*
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||||
* @note There's no limitation on the number of signals that a GPIO can combine with.
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||||
*
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* @param hal Context of the HAL layer
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||||
* @param gpio_num GPIO number, especially, `GPIO_MATRIX_CONST_ZERO_INPUT` means connect logic 0 to signal;
|
||||
* `GPIO_MATRIX_CONST_ONE_INPUT` means connect logic 1 to signal.
|
||||
* @param signal_idx Peripheral signal index (tagged as input attribute). One of the ``*_IN_IDX`` signals in ``soc/gpio_sig_map.h``.
|
||||
* @param in_inv Whether the GPIO input to be inverted or not.
|
||||
*/
|
||||
void gpio_hal_matrix_in(gpio_hal_context_t *hal, uint32_t gpio_num, uint32_t signal_idx, bool in_inv);
|
||||
|
||||
/**
|
||||
* @brief Set peripheral output to an GPIO pad through the GPIO matrix.
|
||||
*
|
||||
* @note There's no limitation on the number of signals that a GPIO can combine with.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
* @param signal_idx Peripheral signal index (tagged as output attribute). One of the ``*_OUT_IDX`` signals in ``soc/gpio_sig_map.h``. Particularly, `SIG_GPIO_OUT_IDX` means disconnect GPIO and other peripherals. Only the GPIO driver can control the output level.
|
||||
* @param out_inv Whether to signal to be inverted or not.
|
||||
* @param oen_inv Whether the output enable control is inverted or not.
|
||||
*/
|
||||
void gpio_hal_matrix_out(gpio_hal_context_t *hal, uint32_t gpio_num, uint32_t signal_idx, bool out_inv, bool oen_inv);
|
||||
|
||||
#if SOC_GPIO_SUPPORT_FORCE_HOLD
|
||||
/**
|
||||
* @brief Force hold all digital gpio pads (including those powered by VDD3P3_RTC power domain).
|
||||
* @note GPIO force hold, whether the chip in sleep mode or wakeup mode.
|
||||
*/
|
||||
#define gpio_hal_force_hold_all() gpio_ll_force_hold_all()
|
||||
|
||||
/**
|
||||
* @brief Force unhold all digital gpio pads (including those powered by VDD3P3_RTC power domain).
|
||||
* @note GPIO force unhold, whether the chip in sleep mode or wakeup mode.
|
||||
*/
|
||||
#define gpio_hal_force_unhold_all() gpio_ll_force_unhold_all()
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enable pull-up on GPIO when system sleep.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_pullup_en(hal, gpio_num) gpio_ll_sleep_pullup_en((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Disable pull-up on GPIO when system sleep.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_pullup_dis(hal, gpio_num) gpio_ll_sleep_pullup_dis((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Enable pull-down on GPIO when system sleep.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_pulldown_en(hal, gpio_num) gpio_ll_sleep_pulldown_en((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Disable pull-down on GPIO when system sleep.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_pulldown_dis(hal, gpio_num) gpio_ll_sleep_pulldown_dis((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Enable sleep select on GPIO.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_sel_en(hal, gpio_num) gpio_ll_sleep_sel_en((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Disable sleep select on GPIO.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_sel_dis(hal, gpio_num) gpio_ll_sleep_sel_dis((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Disable input mode on GPIO when system sleep.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_input_disable(hal, gpio_num) gpio_ll_sleep_input_disable((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Enable input mode on GPIO when system sleep.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_input_enable(hal, gpio_num) gpio_ll_sleep_input_enable((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Disable output mode on GPIO when system sleep.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_output_disable(hal, gpio_num) gpio_ll_sleep_output_disable((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Enable output mode on GPIO when system sleep.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_sleep_output_enable(hal, gpio_num) gpio_ll_sleep_output_enable((hal)->dev, gpio_num)
|
||||
|
||||
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED
|
||||
/**
|
||||
* @brief Enable GPIO deep-sleep wake-up function.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number.
|
||||
* @param intr_type GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used.
|
||||
*/
|
||||
#define gpio_hal_deepsleep_wakeup_enable(hal, gpio_num, intr_type) gpio_ll_deepsleep_wakeup_enable((hal)->dev, gpio_num, intr_type)
|
||||
|
||||
/**
|
||||
* @brief Disable GPIO deep-sleep wake-up function.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_deepsleep_wakeup_disable(hal, gpio_num) gpio_ll_deepsleep_wakeup_disable((hal)->dev, gpio_num)
|
||||
|
||||
/**
|
||||
* @brief Get the status of whether an IO is used for deep-sleep wake-up.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*
|
||||
* @return True if the pin is enabled to wake up from deep-sleep
|
||||
*/
|
||||
#define gpio_hal_deepsleep_wakeup_is_enabled(hal, gpio_num) gpio_ll_deepsleep_wakeup_is_enabled((hal)->dev, gpio_num)
|
||||
#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED
|
||||
|
||||
#if SOC_GPIO_SUPPORT_PIN_HYS_FILTER
|
||||
/**
|
||||
* @brief Control gpio hysteresis enable/disable by software.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
* @param enable enable or disable the hysteresis
|
||||
*/
|
||||
void gpio_hal_hysteresis_soft_enable(gpio_hal_context_t *hal, uint32_t gpio_num, bool enable);
|
||||
|
||||
#if SOC_GPIO_SUPPORT_PIN_HYS_CTRL_BY_EFUSE
|
||||
/**
|
||||
* @brief Set gpio hysteresis enable/disable by efuse.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
#define gpio_hal_hysteresis_from_efuse(hal, gpio_num) gpio_ll_pin_input_hysteresis_ctrl_sel_efuse((hal)->dev, gpio_num)
|
||||
#endif
|
||||
#endif // SOC_GPIO_SUPPORT_PIN_HYS_FILTER
|
||||
|
||||
/**
|
||||
* @brief Helper function to disconnect internal circuits from an GPIO in sleep mode.
|
||||
* This function disables input, output, pullup, pulldown for an GPIO in sleep mode.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param gpio_num GPIO number
|
||||
*/
|
||||
void gpio_hal_isolate_in_sleep(gpio_hal_context_t *hal, uint32_t gpio_num);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,175 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include "soc/soc_caps.h"
|
||||
#include "soc/gpio_num.h"
|
||||
#include "esp_bit_defs.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GPIO_PIN_COUNT (SOC_GPIO_PIN_COUNT)
|
||||
/// Check whether it is a valid GPIO number
|
||||
#define GPIO_IS_VALID_GPIO(gpio_num) ((gpio_num >= 0) && \
|
||||
(((1ULL << (gpio_num)) & SOC_GPIO_VALID_GPIO_MASK) != 0))
|
||||
/// Check whether it can be a valid GPIO number of output mode
|
||||
#define GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) ((gpio_num >= 0) && \
|
||||
(((1ULL << (gpio_num)) & SOC_GPIO_VALID_OUTPUT_GPIO_MASK) != 0))
|
||||
/// Check whether it can be a valid digital I/O pad
|
||||
#define GPIO_IS_VALID_DIGITAL_IO_PAD(gpio_num) ((gpio_num >= 0) && \
|
||||
(((1ULL << (gpio_num)) & SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK) != 0))
|
||||
|
||||
typedef enum {
|
||||
GPIO_PORT_0 = 0,
|
||||
GPIO_PORT_MAX,
|
||||
} gpio_port_t;
|
||||
|
||||
#define GPIO_PIN_REG_0 IO_MUX_GPIO0_REG
|
||||
#define GPIO_PIN_REG_1 IO_MUX_GPIO1_REG
|
||||
#define GPIO_PIN_REG_2 IO_MUX_GPIO2_REG
|
||||
#define GPIO_PIN_REG_3 IO_MUX_GPIO3_REG
|
||||
#define GPIO_PIN_REG_4 IO_MUX_GPIO4_REG
|
||||
#define GPIO_PIN_REG_5 IO_MUX_GPIO5_REG
|
||||
#define GPIO_PIN_REG_6 IO_MUX_GPIO6_REG
|
||||
#define GPIO_PIN_REG_7 IO_MUX_GPIO7_REG
|
||||
#define GPIO_PIN_REG_8 IO_MUX_GPIO8_REG
|
||||
#define GPIO_PIN_REG_9 IO_MUX_GPIO9_REG
|
||||
#define GPIO_PIN_REG_10 IO_MUX_GPIO10_REG
|
||||
#define GPIO_PIN_REG_11 IO_MUX_GPIO11_REG
|
||||
#define GPIO_PIN_REG_12 IO_MUX_GPIO12_REG
|
||||
#define GPIO_PIN_REG_13 IO_MUX_GPIO13_REG
|
||||
#define GPIO_PIN_REG_14 IO_MUX_GPIO14_REG
|
||||
#define GPIO_PIN_REG_15 IO_MUX_GPIO15_REG
|
||||
#define GPIO_PIN_REG_16 IO_MUX_GPIO16_REG
|
||||
#define GPIO_PIN_REG_17 IO_MUX_GPIO17_REG
|
||||
#define GPIO_PIN_REG_18 IO_MUX_GPIO18_REG
|
||||
#define GPIO_PIN_REG_19 IO_MUX_GPIO19_REG
|
||||
#define GPIO_PIN_REG_20 IO_MUX_GPIO20_REG
|
||||
#define GPIO_PIN_REG_21 IO_MUX_GPIO21_REG
|
||||
#define GPIO_PIN_REG_22 IO_MUX_GPIO22_REG
|
||||
#define GPIO_PIN_REG_23 IO_MUX_GPIO23_REG
|
||||
#define GPIO_PIN_REG_24 IO_MUX_GPIO24_REG
|
||||
#define GPIO_PIN_REG_25 IO_MUX_GPIO25_REG
|
||||
#define GPIO_PIN_REG_26 IO_MUX_GPIO26_REG
|
||||
#define GPIO_PIN_REG_27 IO_MUX_GPIO27_REG
|
||||
#define GPIO_PIN_REG_28 IO_MUX_GPIO28_REG
|
||||
#define GPIO_PIN_REG_29 IO_MUX_GPIO29_REG
|
||||
#define GPIO_PIN_REG_30 IO_MUX_GPIO30_REG
|
||||
#define GPIO_PIN_REG_31 IO_MUX_GPIO31_REG
|
||||
#define GPIO_PIN_REG_32 IO_MUX_GPIO32_REG
|
||||
#define GPIO_PIN_REG_33 IO_MUX_GPIO33_REG
|
||||
#define GPIO_PIN_REG_34 IO_MUX_GPIO34_REG
|
||||
#define GPIO_PIN_REG_35 IO_MUX_GPIO35_REG
|
||||
#define GPIO_PIN_REG_36 IO_MUX_GPIO36_REG
|
||||
#define GPIO_PIN_REG_37 IO_MUX_GPIO37_REG
|
||||
#define GPIO_PIN_REG_38 IO_MUX_GPIO38_REG
|
||||
#define GPIO_PIN_REG_39 IO_MUX_GPIO39_REG
|
||||
#define GPIO_PIN_REG_40 IO_MUX_GPIO40_REG
|
||||
#define GPIO_PIN_REG_41 IO_MUX_GPIO41_REG
|
||||
#define GPIO_PIN_REG_42 IO_MUX_GPIO42_REG
|
||||
#define GPIO_PIN_REG_43 IO_MUX_GPIO43_REG
|
||||
#define GPIO_PIN_REG_44 IO_MUX_GPIO44_REG
|
||||
#define GPIO_PIN_REG_45 IO_MUX_GPIO45_REG
|
||||
#define GPIO_PIN_REG_46 IO_MUX_GPIO46_REG
|
||||
#define GPIO_PIN_REG_47 IO_MUX_GPIO47_REG
|
||||
#define GPIO_PIN_REG_48 IO_MUX_GPIO48_REG
|
||||
#define GPIO_PIN_REG_49 IO_MUX_GPIO49_REG
|
||||
#define GPIO_PIN_REG_50 IO_MUX_GPIO50_REG
|
||||
#define GPIO_PIN_REG_51 IO_MUX_GPIO51_REG
|
||||
#define GPIO_PIN_REG_52 IO_MUX_GPIO52_REG
|
||||
#define GPIO_PIN_REG_53 IO_MUX_GPIO53_REG
|
||||
#define GPIO_PIN_REG_54 IO_MUX_GPIO54_REG
|
||||
|
||||
typedef enum {
|
||||
GPIO_INTR_DISABLE = 0, /*!< Disable GPIO interrupt */
|
||||
GPIO_INTR_POSEDGE = 1, /*!< GPIO interrupt type : rising edge */
|
||||
GPIO_INTR_NEGEDGE = 2, /*!< GPIO interrupt type : falling edge */
|
||||
GPIO_INTR_ANYEDGE = 3, /*!< GPIO interrupt type : both rising and falling edge */
|
||||
GPIO_INTR_LOW_LEVEL = 4, /*!< GPIO interrupt type : input low level trigger */
|
||||
GPIO_INTR_HIGH_LEVEL = 5, /*!< GPIO interrupt type : input high level trigger */
|
||||
GPIO_INTR_MAX,
|
||||
} gpio_int_type_t;
|
||||
|
||||
/** @cond */
|
||||
#define GPIO_MODE_DEF_DISABLE (0)
|
||||
#define GPIO_MODE_DEF_INPUT (BIT0) ///< bit mask for input
|
||||
#define GPIO_MODE_DEF_OUTPUT (BIT1) ///< bit mask for output
|
||||
#define GPIO_MODE_DEF_OD (BIT2) ///< bit mask for OD mode
|
||||
/** @endcond */
|
||||
|
||||
typedef enum {
|
||||
GPIO_MODE_DISABLE = GPIO_MODE_DEF_DISABLE, /*!< GPIO mode : disable input and output */
|
||||
GPIO_MODE_INPUT = GPIO_MODE_DEF_INPUT, /*!< GPIO mode : input only */
|
||||
GPIO_MODE_OUTPUT = GPIO_MODE_DEF_OUTPUT, /*!< GPIO mode : output only mode */
|
||||
GPIO_MODE_OUTPUT_OD = ((GPIO_MODE_DEF_OUTPUT) | (GPIO_MODE_DEF_OD)), /*!< GPIO mode : output only with open-drain mode */
|
||||
GPIO_MODE_INPUT_OUTPUT_OD = ((GPIO_MODE_DEF_INPUT) | (GPIO_MODE_DEF_OUTPUT) | (GPIO_MODE_DEF_OD)), /*!< GPIO mode : output and input with open-drain mode*/
|
||||
GPIO_MODE_INPUT_OUTPUT = ((GPIO_MODE_DEF_INPUT) | (GPIO_MODE_DEF_OUTPUT)), /*!< GPIO mode : output and input mode */
|
||||
} gpio_mode_t;
|
||||
|
||||
typedef enum {
|
||||
GPIO_PULLUP_DISABLE = 0x0, /*!< Disable GPIO pull-up resistor */
|
||||
GPIO_PULLUP_ENABLE = 0x1, /*!< Enable GPIO pull-up resistor */
|
||||
} gpio_pullup_t;
|
||||
|
||||
typedef enum {
|
||||
GPIO_PULLDOWN_DISABLE = 0x0, /*!< Disable GPIO pull-down resistor */
|
||||
GPIO_PULLDOWN_ENABLE = 0x1, /*!< Enable GPIO pull-down resistor */
|
||||
} gpio_pulldown_t;
|
||||
|
||||
typedef enum {
|
||||
GPIO_PULLUP_ONLY, /*!< Pad pull up */
|
||||
GPIO_PULLDOWN_ONLY, /*!< Pad pull down */
|
||||
GPIO_PULLUP_PULLDOWN, /*!< Pad pull up + pull down*/
|
||||
GPIO_FLOATING, /*!< Pad floating */
|
||||
} gpio_pull_mode_t;
|
||||
|
||||
typedef enum {
|
||||
GPIO_DRIVE_CAP_0 = 0, /*!< Pad drive capability: weak */
|
||||
GPIO_DRIVE_CAP_1 = 1, /*!< Pad drive capability: stronger */
|
||||
GPIO_DRIVE_CAP_2 = 2, /*!< Pad drive capability: medium */
|
||||
GPIO_DRIVE_CAP_DEFAULT = 2, /*!< Pad drive capability: medium */
|
||||
GPIO_DRIVE_CAP_3 = 3, /*!< Pad drive capability: strongest */
|
||||
GPIO_DRIVE_CAP_MAX,
|
||||
} gpio_drive_cap_t;
|
||||
|
||||
#if SOC_GPIO_SUPPORT_PIN_HYS_FILTER
|
||||
/**
|
||||
* @brief Available option for configuring hysteresis feature of GPIOs
|
||||
*/
|
||||
typedef enum {
|
||||
#if SOC_GPIO_SUPPORT_PIN_HYS_CTRL_BY_EFUSE
|
||||
GPIO_HYS_CTRL_EFUSE = 0, /*!< Pad input hysteresis ctrl by efuse */
|
||||
#endif
|
||||
GPIO_HYS_SOFT_DISABLE, /*!< Pad input hysteresis disable by software */
|
||||
GPIO_HYS_SOFT_ENABLE, /*!< Pad input hysteresis enable by software */
|
||||
} gpio_hys_ctrl_mode_t;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Structure that contains the configuration of an IO
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t fun_sel; /*!< Value of IOMUX function selection */
|
||||
uint32_t sig_out; /*!< Index of the outputting peripheral signal */
|
||||
gpio_drive_cap_t drv; /*!< Value of drive strength */
|
||||
bool pu; /*!< Status of pull-up enabled or not */
|
||||
bool pd; /*!< Status of pull-down enabled or not */
|
||||
bool ie; /*!< Status of input enabled or not */
|
||||
bool oe; /*!< Status of output enabled or not */
|
||||
bool oe_ctrl_by_periph; /*!< True if use output enable signal from peripheral, otherwise False */
|
||||
bool oe_inv; /*!< Whether the output enable signal is inversed or not */
|
||||
bool od; /*!< Status of open-drain enabled or not */
|
||||
bool slp_sel; /*!< Status of pin sleep mode enabled or not */
|
||||
} gpio_io_config_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,348 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* NOTICE
|
||||
* The hal is not public api, don't use in application code.
|
||||
* See readme.md in hal/include/hal/readme.md
|
||||
******************************************************************************/
|
||||
|
||||
// The HAL layer for RTC IO master (common part)
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <esp_err.h>
|
||||
|
||||
#include "soc/soc_caps.h"
|
||||
#if SOC_RTCIO_PIN_COUNT > 0
|
||||
#include "hal/rtc_io_periph.h"
|
||||
#include "hal/rtc_io_ll.h"
|
||||
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
|
||||
#include "hal/rtc_io_types.h"
|
||||
#endif
|
||||
#endif //SOC_RTCIO_PIN_COUNT > 0
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if SOC_RTCIO_PIN_COUNT > 0
|
||||
|
||||
#if SOC_LP_IO_CLOCK_IS_INDEPENDENT
|
||||
/**
|
||||
* Enable rtcio module clock.
|
||||
*/
|
||||
#define rtcio_hal_enable_io_clock(enable) rtcio_ll_enable_io_clock(enable)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Select the rtcio function.
|
||||
*
|
||||
* @note The RTC function must be selected before the pad analog function is enabled.
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param func Select pin function.
|
||||
*/
|
||||
#define rtcio_hal_function_select(rtcio_num, func) rtcio_ll_function_select(rtcio_num, func)
|
||||
|
||||
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
|
||||
/**
|
||||
* Enable rtcio output.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_output_enable(rtcio_num) rtcio_ll_output_enable(rtcio_num)
|
||||
|
||||
/**
|
||||
* Disable rtcio output.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_output_disable(rtcio_num) rtcio_ll_output_disable(rtcio_num)
|
||||
|
||||
/**
|
||||
* Set RTCIO output level.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param level 0: output low; ~0: output high.
|
||||
*/
|
||||
#define rtcio_hal_set_level(rtcio_num, level) rtcio_ll_set_level(rtcio_num, level)
|
||||
|
||||
/**
|
||||
* Enable rtcio input.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_input_enable(rtcio_num) rtcio_ll_input_enable(rtcio_num)
|
||||
|
||||
/**
|
||||
* Disable rtcio input.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_input_disable(rtcio_num) rtcio_ll_input_disable(rtcio_num)
|
||||
|
||||
/**
|
||||
* Get RTCIO input level.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @return 0: input low; ~0: input high.
|
||||
*/
|
||||
#define rtcio_hal_get_level(rtcio_num) rtcio_ll_get_level(rtcio_num)
|
||||
|
||||
/**
|
||||
* @brief Set RTC GPIO pad drive capability.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param strength Drive capability of the pad. Range: 0 ~ 3.
|
||||
*/
|
||||
#define rtcio_hal_set_drive_capability(rtcio_num, strength) rtcio_ll_set_drive_capability(rtcio_num, strength)
|
||||
|
||||
/**
|
||||
* @brief Get RTC GPIO pad drive capability.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @return Drive capability of the pad. Range: 0 ~ 3.
|
||||
*/
|
||||
#define rtcio_hal_get_drive_capability(rtcio_num) rtcio_ll_get_drive_capability(rtcio_num)
|
||||
|
||||
/**
|
||||
* Set RTCIO output level.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param level 0: output low; ~0: output high.
|
||||
*/
|
||||
#define rtcio_hal_set_level(rtcio_num, level) rtcio_ll_set_level(rtcio_num, level)
|
||||
|
||||
/**
|
||||
* Get RTCIO input level.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @return 0: input low; ~0: input high.
|
||||
*/
|
||||
#define rtcio_hal_get_level(rtcio_num) rtcio_ll_get_level(rtcio_num)
|
||||
|
||||
/**
|
||||
* Set RTC IO direction.
|
||||
*
|
||||
* Configure RTC IO direction, such as output only, input only,
|
||||
* output and input.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param mode IO direction.
|
||||
*/
|
||||
void rtcio_hal_set_direction(int rtcio_num, rtc_gpio_mode_t mode);
|
||||
|
||||
/**
|
||||
* Set RTC IO direction in deep sleep or disable sleep status.
|
||||
*
|
||||
* NOTE: ESP32 supports INPUT_ONLY mode.
|
||||
* The rest targets support INPUT_ONLY, OUTPUT_ONLY, INPUT_OUTPUT mode.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param mode IO direction.
|
||||
*/
|
||||
void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode);
|
||||
|
||||
/**
|
||||
* RTC GPIO pullup enable.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_pullup_enable(rtcio_num) rtcio_ll_pullup_enable(rtcio_num)
|
||||
|
||||
/**
|
||||
* RTC GPIO pullup disable.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_pullup_disable(rtcio_num) rtcio_ll_pullup_disable(rtcio_num)
|
||||
|
||||
/**
|
||||
* @brief Get RTC GPIO pad pullup status.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @return Whether the pullup of the pad is enabled or not.
|
||||
*/
|
||||
#define rtcio_hal_is_pullup_enabled(rtcio_num) rtcio_ll_is_pullup_enabled(rtcio_num)
|
||||
|
||||
/**
|
||||
* RTC GPIO pulldown enable.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_pulldown_enable(rtcio_num) rtcio_ll_pulldown_enable(rtcio_num)
|
||||
|
||||
/**
|
||||
* RTC GPIO pulldown disable.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_pulldown_disable(rtcio_num) rtcio_ll_pulldown_disable(rtcio_num)
|
||||
|
||||
/**
|
||||
* @brief Get RTC GPIO pad pulldown status.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @return Whether the pulldown of the pad is enabled or not.
|
||||
*/
|
||||
#define rtcio_hal_is_pulldown_enabled(rtcio_num) rtcio_ll_is_pulldown_enabled(rtcio_num)
|
||||
|
||||
/**
|
||||
* Select a RTC IOMUX function for the RTC IO
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param func Function to assign to the pin
|
||||
*/
|
||||
#define rtcio_hal_iomux_func_sel(rtcio_num, func) rtcio_ll_iomux_func_sel(rtcio_num, func)
|
||||
|
||||
#if SOC_LP_GPIO_MATRIX_SUPPORTED
|
||||
/**
|
||||
* Select RTC GPIO input to a signal
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param signal_idx LP peripheral signal index.
|
||||
* @param inv inv True to invert input signal; False then no invert.
|
||||
*/
|
||||
#define rtcio_hal_matrix_in(rtcio_num, signal_idx, inv) rtcio_ll_matrix_in(rtcio_num, signal_idx, inv)
|
||||
|
||||
/**
|
||||
* Select signal output to a RTC GPIO
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param signal_idx LP peripheral signal index.
|
||||
* @param out_inv True to invert output signal; False then no invert.
|
||||
* @param oen_inv True to invert output enable signal; False then no invert.
|
||||
*/
|
||||
#define rtcio_hal_matrix_out(rtcio_num, signal_idx, out_inv, oen_inv) rtcio_ll_matrix_out(rtcio_num, signal_idx, out_inv, oen_inv)
|
||||
#endif // SOC_LP_GPIO_MATRIX_SUPPORTED
|
||||
|
||||
#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
|
||||
|
||||
#if SOC_RTCIO_HOLD_SUPPORTED
|
||||
|
||||
/**
|
||||
* Enable force hold function on an RTC IO pad.
|
||||
*
|
||||
* Enabling HOLD function will cause the pad to lock current status, such as,
|
||||
* input/output enable, input/output value, function, drive strength values.
|
||||
* This function is useful when going into light or deep sleep mode to prevent
|
||||
* the pin configuration from changing.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_hold_enable(rtcio_num) rtcio_ll_force_hold_enable(rtcio_num)
|
||||
|
||||
/**
|
||||
* Disable hold function on an RTC IO pad.
|
||||
*
|
||||
* @note If disable the pad hold, the status of pad maybe changed in sleep mode.
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_hold_disable(rtcio_num) rtcio_ll_force_hold_disable(rtcio_num)
|
||||
|
||||
/**
|
||||
* Enable force hold function on all RTC IO pads.
|
||||
*
|
||||
* Enabling HOLD function will cause the pad to lock current status, such as,
|
||||
* input/output enable, input/output value, function, drive strength values.
|
||||
* This function is useful when going into light or deep sleep mode to prevent
|
||||
* the pin configuration from changing.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_hold_all() rtcio_ll_force_hold_all()
|
||||
|
||||
/**
|
||||
* Disable hold function on all RTC IO pads.
|
||||
*
|
||||
* @note If disable the pad hold, the status of pad maybe changed in sleep mode.
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_unhold_all() rtcio_ll_force_unhold_all()
|
||||
#endif // SOC_RTCIO_HOLD_SUPPORTED
|
||||
|
||||
#if SOC_RTCIO_WAKE_SUPPORTED
|
||||
|
||||
/**
|
||||
* Enable wakeup function and set wakeup type from light sleep status for rtcio.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param type Wakeup on high level or low level.
|
||||
*/
|
||||
#define rtcio_hal_wakeup_enable(rtcio_num, type) rtcio_ll_wakeup_enable(rtcio_num, type)
|
||||
|
||||
/**
|
||||
* Disable wakeup function from light sleep status for rtcio.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_wakeup_disable(rtcio_num) rtcio_ll_wakeup_disable(rtcio_num)
|
||||
|
||||
/**
|
||||
* Set specific logic level on an RTC IO pin as a ext0 wakeup trigger.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @param level Logic level (0)
|
||||
*/
|
||||
#define rtcio_hal_ext0_set_wakeup_pin(rtcio_num, level) rtcio_ll_ext0_set_wakeup_pin(rtcio_num, level)
|
||||
|
||||
#endif
|
||||
|
||||
#if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
|
||||
|
||||
/**
|
||||
* Helper function to disconnect internal circuits from an RTC IO
|
||||
* This function disables input, output, pullup, pulldown, and enables
|
||||
* hold feature for an RTC IO.
|
||||
* Use this function if an RTC IO needs to be disconnected from internal
|
||||
* circuits in deep sleep, to minimize leakage current.
|
||||
*
|
||||
* In particular, for ESP32-WROVER module, call
|
||||
* rtc_gpio_isolate(GPIO_NUM_12) before entering deep sleep, to reduce
|
||||
* deep sleep current.
|
||||
*
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
void rtcio_hal_isolate(int rtc_num);
|
||||
|
||||
#endif
|
||||
|
||||
#endif //SOC_RTCIO_PIN_COUNT > 0
|
||||
|
||||
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT > 0)
|
||||
|
||||
#define gpio_hal_deepsleep_wakeup_enable(hal, gpio_num, intr_type) rtcio_hal_wakeup_enable(rtc_io_num_map[gpio_num], intr_type)
|
||||
#define gpio_hal_deepsleep_wakeup_disable(hal, gpio_num) rtcio_hal_wakeup_disable(rtc_io_num_map[gpio_num])
|
||||
#define gpio_hal_deepsleep_wakeup_is_enabled(hal, gpio_num) rtcio_hal_wakeup_is_enabled(rtc_io_num_map[gpio_num])
|
||||
#define rtc_hal_gpio_get_wakeup_status() rtcio_hal_get_interrupt_status()
|
||||
#define rtc_hal_gpio_clear_wakeup_status() rtcio_hal_clear_interrupt_status()
|
||||
|
||||
/**
|
||||
* @brief Get the status of whether an IO is used for sleep wake-up.
|
||||
*
|
||||
* @param hw Peripheral GPIO hardware instance address.
|
||||
* @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
* @return True if the pin is enabled to wake up from deep-sleep
|
||||
*/
|
||||
#define rtcio_hal_wakeup_is_enabled(rtcio_num) rtcio_ll_wakeup_is_enabled(rtcio_num)
|
||||
|
||||
/**
|
||||
* @brief Get the rtc io interrupt status
|
||||
*
|
||||
* @return bit 0~7 corresponding to 0 ~ SOC_RTCIO_PIN_COUNT.
|
||||
*/
|
||||
#define rtcio_hal_get_interrupt_status() rtcio_ll_get_interrupt_status()
|
||||
|
||||
/**
|
||||
* @brief Clear all LP IO pads status
|
||||
*/
|
||||
#define rtcio_hal_clear_interrupt_status() rtcio_ll_clear_interrupt_status()
|
||||
|
||||
#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT > 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,65 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
//include soc related (generated) definitions
|
||||
#include "soc/soc_caps.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#if SOC_RTCIO_PIN_COUNT > 0
|
||||
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
|
||||
/**
|
||||
* @brief Pin function information for a single RTCIO pad's.
|
||||
*
|
||||
* This is an internal function of the driver, and is not usually useful
|
||||
* for external use.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t reg; /*!< Register of RTC pad, or 0 if not an RTC GPIO */
|
||||
uint32_t mux; /*!< Bit mask for selecting digital pad or RTC pad */
|
||||
uint32_t func; /*!< Shift of pad function (FUN_SEL) field */
|
||||
uint32_t ie; /*!< Mask of input enable */
|
||||
uint32_t pullup; /*!< Mask of pullup enable */
|
||||
uint32_t pulldown; /*!< Mask of pulldown enable */
|
||||
uint32_t slpsel; /*!< If slpsel bit is set, slpie will be used as pad input enabled signal in sleep mode */
|
||||
uint32_t slpie; /*!< Mask of input enable in sleep mode */
|
||||
uint32_t slpoe; /*!< Mask of output enable in sleep mode */
|
||||
uint32_t hold; /*!< Mask of hold enable */
|
||||
uint32_t hold_force;/*!< Mask of hold_force bit for RTC IO in RTC_CNTL_HOLD_REG */
|
||||
uint32_t drv_v; /*!< Mask of drive capability */
|
||||
uint32_t drv_s; /*!< Offset of drive capability */
|
||||
int rtc_num; /*!< GPIO number (corresponds to RTC pad) */
|
||||
} rtc_io_desc_t;
|
||||
|
||||
/**
|
||||
* @brief Provides access to a constant table of RTC I/O pin
|
||||
* function information.
|
||||
* The index of table is the index of rtcio.
|
||||
*
|
||||
* This is an internal function of the driver, and is not usually useful
|
||||
* for external use.
|
||||
*/
|
||||
extern const rtc_io_desc_t rtc_io_desc[SOC_RTCIO_PIN_COUNT];
|
||||
#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
|
||||
|
||||
/**
|
||||
* @brief Provides a constant table to get rtc io number with gpio number
|
||||
*
|
||||
* This is an internal function of the driver, and is not usually useful
|
||||
* for external use.
|
||||
*/
|
||||
extern const int8_t rtc_io_num_map[SOC_GPIO_PIN_COUNT];
|
||||
#endif //SOC_RTCIO_PIN_COUNT > 0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,25 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** RTCIO output/input mode type. */
|
||||
typedef enum {
|
||||
RTC_GPIO_MODE_INPUT_ONLY, /*!< Pad input */
|
||||
RTC_GPIO_MODE_OUTPUT_ONLY, /*!< Pad output */
|
||||
RTC_GPIO_MODE_INPUT_OUTPUT, /*!< Pad input + output */
|
||||
RTC_GPIO_MODE_DISABLED, /*!< Pad (output + input) disable */
|
||||
RTC_GPIO_MODE_OUTPUT_OD, /*!< Pad open-drain output */
|
||||
RTC_GPIO_MODE_INPUT_OUTPUT_OD, /*!< Pad input + open-drain output */
|
||||
} rtc_gpio_mode_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,49 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
// The HAL layer for sigma delta modulator.
|
||||
// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef struct gpio_sd_dev_t *sdm_soc_handle_t; // Sigma-Delta SOC layer handle
|
||||
|
||||
/**
|
||||
* HAL context type of Sigma-Delta driver
|
||||
*/
|
||||
typedef struct {
|
||||
sdm_soc_handle_t dev;
|
||||
} sdm_hal_context_t;
|
||||
|
||||
/**
|
||||
* @brief Configuration for the Sigma-Delta HAL layer initialization
|
||||
*/
|
||||
typedef struct {
|
||||
int group_id; // Group ID, index from 0
|
||||
} sdm_hal_init_config_t;
|
||||
|
||||
/**
|
||||
* @brief Initialize Sigma-Delta hal driver
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param config Configuration for the HAL layer initialization
|
||||
*/
|
||||
void sdm_hal_init(sdm_hal_context_t *hal, const sdm_hal_init_config_t *config);
|
||||
|
||||
/**
|
||||
* @brief Deinitialize Sigma-Delta hal driver
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
*/
|
||||
void sdm_hal_deinit(sdm_hal_context_t *hal);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,53 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include "soc/soc_caps_full.h"
|
||||
#include "soc/periph_defs.h"
|
||||
#include "soc/regdma.h"
|
||||
|
||||
#if SOC_HAS(PAU)
|
||||
#include "soc/retention_periph_defs.h"
|
||||
#endif // SOC_HAS(PAU)
|
||||
|
||||
// helper macros to access module attributes
|
||||
#define SOC_SDM_ATTR(_attr) SOC_MODULE_ATTR(SDM, _attr)
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if SOC_HAS(SDM)
|
||||
|
||||
typedef struct {
|
||||
const char *module_name; // Module name
|
||||
struct {
|
||||
const int sig_id_matrix; // signal ID in the GPIO matrix
|
||||
} channels[SOC_SDM_ATTR(CHANS_PER_INST)];
|
||||
} soc_sdm_signal_desc_t;
|
||||
|
||||
extern const soc_sdm_signal_desc_t soc_sdm_signals[SOC_SDM_ATTR(INST_NUM)];
|
||||
|
||||
#if SOC_HAS(PAU)
|
||||
|
||||
typedef struct {
|
||||
const periph_retention_module_t module; // ID of the SDM as a retention module
|
||||
const regdma_entries_config_t *regdma_entry_array; // Array of regdma entries for retention
|
||||
const size_t array_size; // Size of the regdma_entry_array
|
||||
} soc_sdm_retention_desc_t;
|
||||
|
||||
extern const soc_sdm_retention_desc_t soc_sdm_retention_infos[SOC_SDM_ATTR(INST_NUM)];
|
||||
|
||||
#endif // SOC_HAS(PAU)
|
||||
|
||||
#endif // SOC_HAS(SDM)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,24 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "soc/clk_tree_defs.h"
|
||||
#include "soc/soc_caps.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if SOC_SDM_SUPPORTED
|
||||
typedef soc_periph_sdm_clk_src_t sdm_clock_source_t; // sigma delta modulator clock source
|
||||
#else
|
||||
typedef int sdm_clock_source_t; // sigma delta modulator clock source, fallback to integer type
|
||||
#endif // SOC_SDM_SUPPORTED
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
Reference in New Issue
Block a user