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refactor(clk): split clock HAL into separate component
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@@ -23,6 +23,7 @@ set(esp_hal_components
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esp_hal_wdt
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esp_hal_pmu
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esp_hal_rtc_timer
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esp_hal_clock
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)
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set(COMPONENTS ${g0_components} ${g1_components} ${esp_hal_components} main)
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