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change(parlio_tx): use shift edge instead sample edge

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Chen Jichang
2026-05-06 10:13:28 +08:00
committed by morris
parent f05bd1c0fc
commit 61dcb5b61f
10 changed files with 48 additions and 40 deletions
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components/hal/esp32c5/include/hal/parlio_ll.h
+6 -7
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -516,16 +516,15 @@ static inline void parlio_ll_tx_treat_msb_as_valid(parl_io_dev_t *dev, bool en)
}
/**
* @brief Set the sample clock edge
* @brief Set the shift clock edge
*
* @param dev Parallel IO register base address
* @param edge Sample clock edge
* @param edge Shift clock edge
*/
static inline void parlio_ll_tx_set_sample_clock_edge(parl_io_dev_t *dev, parlio_sample_edge_t edge)
static inline void parlio_ll_tx_set_shift_clock_edge(parl_io_dev_t *dev, parlio_shift_edge_t edge)
{
bool invert = edge == PARLIO_SAMPLE_EDGE_NEG;
dev->tx_clk_cfg.tx_clk_i_inv = invert;
dev->tx_clk_cfg.tx_clk_o_inv = invert;
dev->tx_clk_cfg.tx_clk_i_inv = edge;
dev->tx_clk_cfg.tx_clk_o_inv = edge;
}
/**
components/hal/esp32c6/include/hal/parlio_ll.h
+4 -4
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -492,12 +492,12 @@ static inline void parlio_ll_tx_treat_msb_as_valid(parl_io_dev_t *dev, bool en)
}
/**
* @brief Set the sample clock edge
* @brief Set the shift clock edge
*
* @param dev Parallel IO register base address
* @param edge Sample clock edge
* @param edge Shift clock edge
*/
static inline void parlio_ll_tx_set_sample_clock_edge(parl_io_dev_t *dev, parlio_sample_edge_t edge)
static inline void parlio_ll_tx_set_shift_clock_edge(parl_io_dev_t *dev, parlio_shift_edge_t edge)
{
dev->tx_cfg0.tx_smp_edge_sel = edge;
}
components/hal/esp32h2/include/hal/parlio_ll.h
+6 -7
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -500,16 +500,15 @@ static inline void parlio_ll_tx_treat_msb_as_valid(parl_io_dev_t *dev, bool en)
}
/**
* @brief Set the sample clock edge
* @brief Set the shift clock edge
*
* @param dev Parallel IO register base address
* @param edge Sample clock edge
* @param edge Shift clock edge
*/
static inline void parlio_ll_tx_set_sample_clock_edge(parl_io_dev_t *dev, parlio_sample_edge_t edge)
static inline void parlio_ll_tx_set_shift_clock_edge(parl_io_dev_t *dev, parlio_shift_edge_t edge)
{
bool invert = edge == PARLIO_SAMPLE_EDGE_NEG;
dev->tx_clk_cfg.tx_clk_i_inv = invert;
dev->tx_clk_cfg.tx_clk_o_inv = invert;
dev->tx_clk_cfg.tx_clk_i_inv = edge;
dev->tx_clk_cfg.tx_clk_o_inv = edge;
}
/**
components/hal/esp32p4/include/hal/parlio_ll.h
+6 -7
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -565,16 +565,15 @@ static inline void parlio_ll_tx_treat_msb_as_valid(parl_io_dev_t *dev, bool en)
}
/**
* @brief Set the sample clock edge
* @brief Set the shift clock edge
*
* @param dev Parallel IO register base address
* @param edge Sample clock edge
* @param edge Shift clock edge
*/
static inline void parlio_ll_tx_set_sample_clock_edge(parl_io_dev_t *dev, parlio_sample_edge_t edge)
static inline void parlio_ll_tx_set_shift_clock_edge(parl_io_dev_t *dev, parlio_shift_edge_t edge)
{
bool invert = edge == PARLIO_SAMPLE_EDGE_NEG;
dev->tx_clk_cfg.tx_clk_i_inv = invert;
dev->tx_clk_cfg.tx_clk_o_inv = invert;
dev->tx_clk_cfg.tx_clk_i_inv = edge;
dev->tx_clk_cfg.tx_clk_o_inv = edge;
}
/**
components/hal/include/hal/parlio_types.h
+10 -2
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -16,13 +16,21 @@ extern "C" {
#endif
/**
* @brief Parallel IO sample edge
* @brief Parallel IO Rx sample edge
*/
typedef enum {
PARLIO_SAMPLE_EDGE_NEG, /*!< Sample data on falling edge of clock */
PARLIO_SAMPLE_EDGE_POS, /*!< Sample data on rising edge of clock */
} parlio_sample_edge_t;
/**
* @brief Parallel IO Tx shift edge
*/
typedef enum {
PARLIO_SHIFT_EDGE_POS, /*!< Shift data on rising edge of clock */
PARLIO_SHIFT_EDGE_NEG, /*!< Shift data on falling edge of clock */
} parlio_shift_edge_t;
/**
* @brief Parallel IO bit packing order
*