Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-01 18:50:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

change(parlio_tx): use shift edge instead sample edge

Browse Source 
Made-with: Cursor
This commit is contained in:
Chen Jichang
2026-05-06 10:13:28 +08:00
committed by morris
parent f05bd1c0fc
commit 61dcb5b61f
10 changed files with 48 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_driver_parlio/include/driver/parlio_tx.h
+5 -2
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -33,7 +33,10 @@ typedef struct {
size_t trans_queue_depth; /*!< Depth of internal transaction queue */
size_t max_transfer_size; /*!< Maximum transfer size in one transaction, in bytes. This decides the number of DMA nodes will be used for each transaction */
size_t dma_burst_size; /*!< DMA burst size, in bytes */
parlio_sample_edge_t sample_edge; /*!< Parallel IO sample edge */
union {
parlio_sample_edge_t sample_edge __attribute__((deprecated("Please use `shift_edge` instead"))); /*!< Parallel IO sample edge */
parlio_shift_edge_t shift_edge; /*!< Parallel IO Tx shift edge */
};
parlio_bit_pack_order_t bit_pack_order; /*!< Set the order of packing the bits into bytes (only works when `data_width` < 8) */
struct {
uint32_t clk_gate_en: 1; /*!< Enable TX clock gating,