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feat(esp_hw_support): support PMU clock ICG management for esp32s31
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@@ -1,11 +1,13 @@
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0 OR MIT
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*/
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#ifndef _SOC_ICG_MAP_H_
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#define _SOC_ICG_MAP_H_
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#include <stdint.h>
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#define PMU_ICG_APB_ENA_CAN0 18
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#define PMU_ICG_APB_ENA_CAN1 19
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#define PMU_ICG_APB_ENA_GDMA 1
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@@ -39,7 +41,7 @@
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#define PMU_ICG_FUNC_ENA_I2S_RX 2
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#define PMU_ICG_FUNC_ENA_I2S_TX 7
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#define PMU_ICG_FUNC_ENA_IOMUX 28
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#define PMU_ICG_FUNC_ENA_LEDC 27
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#define PMU_ICG_FUNC_ENA_LEDC0 27
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#define PMU_ICG_FUNC_ENA_MEM_MONITOR 10
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#define PMU_ICG_FUNC_ENA_MSPI 26
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#define PMU_ICG_FUNC_ENA_PARL_RX 25
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@@ -65,4 +67,16 @@
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#define PMU_ICG_FUNC_ENA_UHCI 5
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#define PMU_ICG_FUNC_ENA_HPCORE 17
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#define PMU_ICG_FUNC_ENA_HPBUS 15
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef uint32_t pmu_sleep_clk_icg_flags_t;
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#define PMU_SLEEP_CLK_ICG_BIT(b) (((pmu_sleep_clk_icg_flags_t)1) << (b))
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SOC_ICG_MAP_H_ */
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