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Merge branch 'fix/s31_cam_freq_limit' into 'master'

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dvp / lcd: added pclk freq limit in programming guide

See merge request espressif/esp-idf!49205
This commit is contained in:
morris
2026-06-08 16:55:58 +08:00
parent 9b343dc749 b3fee0f454
commit 614fc9846c
6 changed files with 62 additions and 0 deletions
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docs/en/api-reference/peripherals/camera_driver.rst
+12
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@@ -149,6 +149,18 @@ You can implement the camera controller driver using one of the following method
* Full range: 0-255 for both RGB and YUV
* Limited range: RGB 16-240, YUV Y:16-240, U-V:16-235
.. note::
- When :cpp:member:`esp_cam_ctlr_dvp_config_t::cam_data_width` is set to 8:
- The CAM_PCLK frequency is recommended to be less than 80 MHz.
- If YUV-RGB format conversion is also configured via :cpp:func:`esp_cam_ctlr_format_conversion`, the CAM_PCLK frequency is recommended to be less than 60 MHz.
- When :cpp:member:`esp_cam_ctlr_dvp_config_t::cam_data_width` is set to 16:
- The CAM_PCLK frequency is recommended to be less than 40 MHz.
- If YUV-RGB format conversion is also configured via :cpp:func:`esp_cam_ctlr_format_conversion`, the CAM_PCLK frequency is recommended to be less than 30 MHz.
.. code:: c
#include "esp_err.h"
docs/en/api-reference/peripherals/lcd/i80_lcd.rst
+7
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@@ -42,6 +42,13 @@ I80 Interfaced LCD
- :cpp:member:`esp_lcd_panel_io_i80_config_t::lcd_cmd_bits` and :cpp:member:`esp_lcd_panel_io_i80_config_t::lcd_param_bits` set the bit width of the command and parameter that recognized by the LCD controller chip. This is chip specific, you should refer to your LCD spec in advance.
- :cpp:member:`esp_lcd_panel_io_i80_config_t::trans_queue_depth` sets the maximum number of transactions that can be queued in the LCD IO device. A bigger value means more transactions can be queued up, but it also consumes more memory.
.. note::
The output pixel clock PCLK frequency has an upper limit that depends on the data bus width:
- When :cpp:member:`esp_lcd_i80_bus_config_t::bus_width` is 8, the PCLK frequency is recommended to be less than 80 MHz.
- When :cpp:member:`esp_lcd_i80_bus_config_t::bus_width` is 16, the PCLK frequency is recommended to be less than 40 MHz.
.. code-block:: c
esp_lcd_panel_io_handle_t io_handle = NULL;
docs/en/api-reference/peripherals/lcd/rgb_lcd.rst
+12
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@@ -16,6 +16,18 @@ RGB LCD panel is created by :cpp:func:`esp_lcd_new_rgb_panel`, with various conf
- :cpp:member:`esp_lcd_rgb_panel_config_t::num_fbs` specifies how many frame buffers the driver should allocate. For backward compatibility, setting this to ``0`` will allocate a single frame buffer. If you don't want to allocate any frame buffer, use :cpp:member:`esp_lcd_rgb_panel_config_t::no_fb` instead.
- :cpp:member:`esp_lcd_rgb_panel_config_t::no_fb` determines whether frame buffer will be allocated. When it is set, no frame buffer will be allocated. This is also called the :ref:`bounce_buffer_only` mode.
.. note::
- When :cpp:member:`esp_lcd_rgb_panel_config_t::data_width` is 8:
- The PCLK frequency is recommended to be less than 80 MHz.
- If YUV-RGB format conversion is also configured via :cpp:func:`esp_lcd_rgb_panel_set_yuv_conversion`, the PCLK frequency is recommended to be less than 60 MHz.
- When :cpp:member:`esp_lcd_rgb_panel_config_t::data_width` is 16:
- The PCLK frequency is recommended to be less than 40 MHz.
- If YUV-RGB format conversion is also configured, the PCLK frequency is recommended to be less than 30 MHz.
GPIO Matrix and IOMUX Pins
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