mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-02 03:00:34 +03:00
fix(spm): rename scp (scratchpad) to spm (scratchpad memory)
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@@ -710,8 +710,8 @@ esp_err_t dma2d_set_desc_addr(dma2d_channel_handle_t dma2d_chan, intptr_t desc_b
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{
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esp_err_t ret = ESP_OK;
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ESP_GOTO_ON_FALSE_ISR(dma2d_chan && desc_base_addr, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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// 2D-DMA descriptor addr needs 8-byte alignment and not in SCP (addr not in SCP is IDF restriction)
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ESP_GOTO_ON_FALSE_ISR((desc_base_addr & 0x7) == 0 && !esp_ptr_in_scp((void *)desc_base_addr), ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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// 2D-DMA descriptor addr needs 8-byte alignment and not in SPM (addr not in SPM is IDF restriction)
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ESP_GOTO_ON_FALSE_ISR((desc_base_addr & 0x7) == 0 && !esp_ptr_in_spm((void *)desc_base_addr), ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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dma2d_group_t *group = dma2d_chan->group;
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int channel_id = dma2d_chan->channel_id;
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@@ -52,8 +52,8 @@ bool esp_ptr_byte_accessible(const void *p)
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intptr_t ip = (intptr_t) p;
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bool r;
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r = (ip >= SOC_BYTE_ACCESSIBLE_LOW && ip < SOC_BYTE_ACCESSIBLE_HIGH);
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#if SOC_MEM_SCP_SUPPORTED
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r |= esp_ptr_in_scp(p);
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#if SOC_MEM_SPM_SUPPORTED
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r |= esp_ptr_in_spm(p);
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#endif
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#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
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/* For ESP32 case, RTC fast memory is accessible to PRO cpu only and hence
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@@ -196,31 +196,31 @@ inline static void * esp_ptr_diram_iram_to_dram(const void *p) {
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#endif
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}
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#if SOC_MEM_SCP_SUPPORTED
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#if SOC_MEM_SPM_SUPPORTED
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/**
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* @brief Check if the pointer is in TCM (SCP)
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* @brief Check if the pointer is in TCM (SPM)
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*
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* @param p pointer
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*
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* @return true: is in TCM (SCP); false: not in TCM (SCP)
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* @return true: is in TCM (SPM); false: not in TCM (SPM)
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*/
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__attribute__((always_inline, deprecated("esp_ptr_in_tcm is deprecated, please use esp_ptr_in_scp instead")))
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__attribute__((always_inline, deprecated("esp_ptr_in_tcm is deprecated, please use esp_ptr_in_spm instead")))
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inline static bool esp_ptr_in_tcm(const void *p) {
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return ((intptr_t)p >= SOC_SCP_LOW && (intptr_t)p < SOC_SCP_HIGH);
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return ((intptr_t)p >= SOC_SPM_LOW && (intptr_t)p < SOC_SPM_HIGH);
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}
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/**
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* @brief Check if the pointer is in SCP
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* @brief Check if the pointer is in SPM
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*
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* @param p pointer
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*
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* @return true: is in SCP; false: not in SCP
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* @return true: is in SPM; false: not in SPM
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*/
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__attribute__((always_inline))
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inline static bool esp_ptr_in_scp(const void *p) {
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return ((intptr_t)p >= SOC_SCP_LOW && (intptr_t)p < SOC_SCP_HIGH);
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inline static bool esp_ptr_in_spm(const void *p) {
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return ((intptr_t)p >= SOC_SPM_LOW && (intptr_t)p < SOC_SPM_HIGH);
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}
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#endif //#if SOC_MEM_SCP_SUPPORTED
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#endif //#if SOC_MEM_SPM_SUPPORTED
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/** End of common functions to be kept in sync with bootloader_memory_utils.h **/
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/** Add app-specific functions below **/
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@@ -290,8 +290,8 @@ inline static bool esp_ptr_internal(const void *p) {
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bool r;
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r = ((intptr_t)p >= SOC_MEM_INTERNAL_LOW && (intptr_t)p < SOC_MEM_INTERNAL_HIGH);
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#if SOC_MEM_SCP_SUPPORTED
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r |= esp_ptr_in_scp(p);
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#if SOC_MEM_SPM_SUPPORTED
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r |= esp_ptr_in_spm(p);
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#endif
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#if SOC_RTC_SLOW_MEM_SUPPORTED
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@@ -14,7 +14,7 @@
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#define MTVT (0x307)
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#define MINTTHRESH (0x347)
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.section .scp.data,"aw"
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.section .spm.data,"aw"
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.global rv_core_critical_regs_frame
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.type rv_core_critical_regs_frame,@object
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.align 4
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@@ -33,7 +33,7 @@ rv_core_critical_regs_frame:
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--------------------------------------------------------------------------------
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*/
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.section .scp.text,"ax"
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.section .spm.text,"ax"
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.global rv_core_critical_regs_save
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.type rv_core_critical_regs_save,@function
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.align 4
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@@ -8,7 +8,7 @@
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#include "freertos/FreeRTOSConfig.h"
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#include "sdkconfig.h"
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.section .tcm.text,"ax"
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.section .spm.text,"ax"
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.global rv_core_fpu_save
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.type rv_core_fpu_save,@function
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.align 4
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@@ -47,12 +47,12 @@ static void esp_cpu_configure_invalid_regions(void)
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// 0. Gap at bottom of address space
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PMA_RESET_AND_ENTRY_SET_NAPOT(0, 0, SOC_CPU_SUBSYSTEM_LOW, PMA_NAPOT | PMA_NONE);
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// 1. Gap between CPU subsystem region & HP SCP
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// 1. Gap between CPU subsystem region & HP SPM
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PMA_RESET_AND_ENTRY_SET_TOR(1, SOC_CPU_SUBSYSTEM_HIGH, PMA_NONE);
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PMA_RESET_AND_ENTRY_SET_TOR(2, SOC_SCP_LOW, PMA_TOR | PMA_NONE);
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PMA_RESET_AND_ENTRY_SET_TOR(2, SOC_SPM_LOW, PMA_TOR | PMA_NONE);
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// 2. Gap between HP SCP and CPU Peripherals
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PMA_RESET_AND_ENTRY_SET_TOR(3, SOC_SCP_HIGH, PMA_NONE);
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// 2. Gap between HP SPM and CPU Peripherals
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PMA_RESET_AND_ENTRY_SET_TOR(3, SOC_SPM_HIGH, PMA_NONE);
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PMA_RESET_AND_ENTRY_SET_TOR(4, CPU_PERIPH_LOW, PMA_TOR | PMA_NONE);
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// 3. Gap between CPU Peripherals and I_Cache
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