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refactor(esp_hal_regi2c): move regi2c implementation from esp_rom to esp_hal_regi2c

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Song Ruo Jing
2026-03-10 15:08:51 +08:00
parent 17133fbc0e
commit 600bf5b6d7
176 changed files with 1975 additions and 1825 deletions
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components/esp_hal_clock/esp32s31/include/hal/clk_tree_ll.h
+52
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@@ -351,6 +351,32 @@ static inline __attribute__((always_inline)) void clk_ll_cpll_set_config(uint32_
// TODO: [ESP32S31] IDF-14733
}
/**
* @brief Start CPLL self-calibration
*/
static inline __attribute__((always_inline)) void clk_ll_cpll_calibration_start(void)
{
CLEAR_PERI_REG_MASK(HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_CPU_PLL_CAL_STOP);
}
/**
* @brief Stop CPLL self-calibration
*/
static inline __attribute__((always_inline)) void clk_ll_cpll_calibration_stop(void)
{
SET_PERI_REG_MASK(HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_CPU_PLL_CAL_STOP);
}
/**
* @brief Check whether CPLL calibration is done
*
* @return True if calibration is done; otherwise false
*/
static inline __attribute__((always_inline)) bool clk_ll_cpll_calibration_is_done(void)
{
return REG_GET_BIT(HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_CPU_PLL_CAL_END);
}
/**
* @brief Get MPLL_CLK frequency (only reliable when MPLL power is on)
*
@@ -376,6 +402,32 @@ static inline __attribute__((always_inline)) void clk_ll_mpll_set_config(uint32_
// TODO: [ESP32S31] IDF-14733
}
/**
* @brief Start MPLL self-calibration
*/
static inline __attribute__((always_inline)) void clk_ll_mpll_calibration_start(void)
{
CLEAR_PERI_REG_MASK(HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_MSPI_CAL_STOP);
}
/**
* @brief Stop MPLL self-calibration
*/
static inline __attribute__((always_inline)) void clk_ll_mpll_calibration_stop(void)
{
SET_PERI_REG_MASK(HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_MSPI_CAL_STOP);
}
/**
* @brief Check whether MPLL calibration is done
*
* @return True if calibration is done; otherwise false
*/
static inline __attribute__((always_inline)) bool clk_ll_mpll_calibration_is_done(void)
{
return REG_GET_BIT(HP_SYS_CLKRST_ANA_PLL_CTRL0_REG, HP_SYS_CLKRST_REG_MSPI_CAL_END);
}
/**
* @brief Get APLL configuration which can be used to calculate APLL frequency
*