diff --git a/components/bootloader/subproject/main/ld/esp32p4/bootloader.memory.ld.in b/components/bootloader/subproject/main/ld/esp32p4/bootloader.memory.ld.in index e7b0611af49..e7870d8dcb1 100644 --- a/components/bootloader/subproject/main/ld/esp32p4/bootloader.memory.ld.in +++ b/components/bootloader/subproject/main/ld/esp32p4/bootloader.memory.ld.in @@ -31,7 +31,7 @@ #endif bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ bootloader_dram_seg_len = 0x5000; -bootloader_iram_loader_seg_len = 0x7000; +bootloader_iram_loader_seg_len = 0x8000; bootloader_iram_seg_len = 0x2D00; /* Start of the lower region is determined by region size and the end of the higher region */ @@ -54,9 +54,9 @@ MEMORY * 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32p4/memory.ld.in to the same value. */ #if !CONFIG_ESP32P4_SELECTS_REV_LESS_V3 -#define BOOTLOADER_IRAM_LOADER_SEG_START_EXPECTED 0x4FFAEFC0 +#define BOOTLOADER_IRAM_LOADER_SEG_START_EXPECTED 0x4FFADFC0 #else -#define BOOTLOADER_IRAM_LOADER_SEG_START_EXPECTED 0x4FF2CBD0 +#define BOOTLOADER_IRAM_LOADER_SEG_START_EXPECTED 0x4FF2BBD0 #endif ASSERT(bootloader_iram_loader_seg_start == BOOTLOADER_IRAM_LOADER_SEG_START_EXPECTED, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END"); diff --git a/components/esp_common/include/esp_fault.h b/components/esp_common/include/esp_fault.h index 81c47741aa5..7ddd6ce43e9 100644 --- a/components/esp_common/include/esp_fault.h +++ b/components/esp_common/include/esp_fault.h @@ -1,13 +1,14 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ +#pragma once + +#include #include "sdkconfig.h" #include "esp_rom_sys.h" -#pragma once - #ifdef __cplusplus extern "C" { #endif @@ -19,6 +20,10 @@ extern "C" { * - Expands CONDITION multiple times (condition must have no side effects) * - Compiler is told all registers are invalid before evaluating CONDITION each time, to avoid a fault * causing a misread of a register used in all three evaluations of CONDITION. + * - The result of each evaluation is stored into a volatile variable and re-read before the branch. + * This prevents the compiler from constant-folding CONDITION and deleting the whole check when it + * has already proven the value - e.g. when this macro follows a normal "if (!cond) { ... }" check + * of the same value, which would otherwise silently remove the fault-injection protection. * - If CONDITION is ever false, a system reset is triggered. * * @note Place this macro after a "normal" check of CONDITION that will fail with a normal error @@ -40,13 +45,20 @@ extern "C" { * @param CONDITION A condition which will evaluate true unless an attacker used fault injection to skip or corrupt some other critical system calculation. * */ -#define ESP_FAULT_ASSERT(CONDITION) do { \ - asm volatile ("" ::: "memory"); \ - if(!(CONDITION)) _ESP_FAULT_RESET(); \ - asm volatile ("" ::: "memory"); \ - if(!(CONDITION)) _ESP_FAULT_RESET(); \ - asm volatile ("" ::: "memory"); \ - if(!(CONDITION)) _ESP_FAULT_RESET(); \ +#define ESP_FAULT_ASSERT(CONDITION) do { \ + bool esp_fault_assert_chk; \ + asm volatile ("" ::: "memory"); \ + esp_fault_assert_chk = (CONDITION); \ + asm volatile ("" : "+r"(esp_fault_assert_chk)); \ + if(!esp_fault_assert_chk) _ESP_FAULT_RESET(); \ + asm volatile ("" ::: "memory"); \ + esp_fault_assert_chk = (CONDITION); \ + asm volatile ("" : "+r"(esp_fault_assert_chk)); \ + if(!esp_fault_assert_chk) _ESP_FAULT_RESET(); \ + asm volatile ("" ::: "memory"); \ + esp_fault_assert_chk = (CONDITION); \ + asm volatile ("" : "+r"(esp_fault_assert_chk)); \ + if(!esp_fault_assert_chk) _ESP_FAULT_RESET(); \ } while(0) #if CONFIG_IDF_TARGET_ARCH_XTENSA diff --git a/components/esp_system/ld/esp32p4/memory.ld.in b/components/esp_system/ld/esp32p4/memory.ld.in index 78770994f71..6ce7e651499 100644 --- a/components/esp_system/ld/esp32p4/memory.ld.in +++ b/components/esp_system/ld/esp32p4/memory.ld.in @@ -17,11 +17,11 @@ #if !CONFIG_ESP32P4_SELECTS_REV_LESS_V3 #define SRAM_START 0x4FF00000 + CONFIG_CACHE_L2_CACHE_SIZE -#define SRAM_END 0x4FFAEFC0 /* 2nd stage bootloader iram_loader_seg start address */ +#define SRAM_END 0x4FFADFC0 /* 2nd stage bootloader iram_loader_seg start address */ #define SRAM_SIZE SRAM_END - SRAM_START #else #define SRAM_LOW_START 0x4FF00000 -#define SRAM_LOW_END 0x4FF2CBD0 /* 2nd stage bootloader iram_loader_seg start address */ +#define SRAM_LOW_END 0x4FF2BBD0 /* 2nd stage bootloader iram_loader_seg start address */ #define SRAM_LOW_SIZE SRAM_LOW_END - SRAM_LOW_START /* If the cache size is less than 512KB, then there is a region of RAM diff --git a/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.default b/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.default index e69de29bb2d..ccdf42de1af 100644 --- a/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.default +++ b/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.default @@ -0,0 +1,3 @@ +# Increasing TEE IRAM size +# 38KB +CONFIG_SECURE_TEE_IRAM_SIZE=0x9800 diff --git a/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.release b/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.release index ebc7481de30..dacd12be7d7 100644 --- a/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.release +++ b/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.release @@ -2,8 +2,8 @@ # builds across various configurations - and is not intended for production use. # Reducing TEE IRAM size -# 29KB -CONFIG_SECURE_TEE_IRAM_SIZE=0x7400 +# 29.5KB +CONFIG_SECURE_TEE_IRAM_SIZE=0x7600 # TEE Secure Storage: Release mode CONFIG_SECURE_TEE_SEC_STG_MODE_RELEASE=y diff --git a/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.sb_fe b/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.sb_fe index 592e56ea491..d7965f52905 100644 --- a/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.sb_fe +++ b/components/esp_tee/test_apps/tee_cli_app/sdkconfig.ci.sb_fe @@ -2,8 +2,8 @@ # builds across various configurations - and is not intended for production use. # Increasing TEE I/DRAM sizes -# 34KB -CONFIG_SECURE_TEE_IRAM_SIZE=0x8800 +# 38KB +CONFIG_SECURE_TEE_IRAM_SIZE=0x9800 # 22KB CONFIG_SECURE_TEE_DRAM_SIZE=0x5800 diff --git a/components/esp_tee/test_apps/tee_test_fw/sdkconfig.ci.tee_ota b/components/esp_tee/test_apps/tee_test_fw/sdkconfig.ci.tee_ota index 71e5dddc2d7..a9ce6c4279e 100644 --- a/components/esp_tee/test_apps/tee_test_fw/sdkconfig.ci.tee_ota +++ b/components/esp_tee/test_apps/tee_test_fw/sdkconfig.ci.tee_ota @@ -16,3 +16,7 @@ CONFIG_SECURE_TEE_ATT_KEY_STR_ID="tee_att_keyN" # Enabling flash protection over SPI1 CONFIG_SECURE_TEE_EXT_FLASH_MEMPROT_SPI1=y + +# Increasing TEE IRAM size +# 38KB +CONFIG_SECURE_TEE_IRAM_SIZE=0x9800 diff --git a/components/spi_flash/test_apps/flash_encryption/partitions.csv b/components/spi_flash/test_apps/flash_encryption/partitions.csv index c941d8f4f1c..f5933e6f71f 100644 --- a/components/spi_flash/test_apps/flash_encryption/partitions.csv +++ b/components/spi_flash/test_apps/flash_encryption/partitions.csv @@ -1,5 +1,5 @@ # Name, Type, SubType, Offset, Size, Flags # Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap -nvs, data, nvs, 0x9000, 0x6000, -factory, 0, 0, 0x10000, 1M +nvs, data, nvs, , 0x6000, +factory, 0, 0, , 1M flash_test, data, fat, , 528K diff --git a/components/spi_flash/test_apps/flash_encryption/sdkconfig.defaults b/components/spi_flash/test_apps/flash_encryption/sdkconfig.defaults index d0ef86b66cf..c41595c93ec 100644 --- a/components/spi_flash/test_apps/flash_encryption/sdkconfig.defaults +++ b/components/spi_flash/test_apps/flash_encryption/sdkconfig.defaults @@ -1,4 +1,5 @@ CONFIG_ESP_TASK_WDT_EN=n +CONFIG_PARTITION_TABLE_OFFSET=0X9000 CONFIG_PARTITION_TABLE_CUSTOM=y CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" CONFIG_SECURE_FLASH_ENC_ENABLED=y diff --git a/examples/system/efuse/sdkconfig.ci.virt_secure_boot_v2.esp32c5 b/examples/system/efuse/sdkconfig.ci.virt_secure_boot_v2.esp32c5 index 687b15f1e82..9a5317f9e20 100644 --- a/examples/system/efuse/sdkconfig.ci.virt_secure_boot_v2.esp32c5 +++ b/examples/system/efuse/sdkconfig.ci.virt_secure_boot_v2.esp32c5 @@ -2,7 +2,7 @@ CONFIG_IDF_TARGET="esp32c5" -CONFIG_PARTITION_TABLE_OFFSET=0xD000 +CONFIG_PARTITION_TABLE_OFFSET=0xE000 CONFIG_PARTITION_TABLE_CUSTOM=y CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="test/partitions_efuse_emul.csv" diff --git a/examples/system/efuse/sdkconfig.ci.virt_secure_boot_v2.esp32p4 b/examples/system/efuse/sdkconfig.ci.virt_secure_boot_v2.esp32p4 index 5305d602c62..1b83c3d5946 100644 --- a/examples/system/efuse/sdkconfig.ci.virt_secure_boot_v2.esp32p4 +++ b/examples/system/efuse/sdkconfig.ci.virt_secure_boot_v2.esp32p4 @@ -2,7 +2,7 @@ CONFIG_IDF_TARGET="esp32p4" -CONFIG_PARTITION_TABLE_OFFSET=0xD000 +CONFIG_PARTITION_TABLE_OFFSET=0XE000 CONFIG_PARTITION_TABLE_CUSTOM=y CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="test/partitions_efuse_emul.csv"