fix(esp_system): remove leftover CPU frequency workaround help on ESP32-C5

Relates to https://github.com/espressif/esp-idf/issues/19010
This commit is contained in:
Michael.B
2026-09-08 03:29:23 +08:00
committed by Michael (XIAO Xufeng)
parent c712a0dde3
commit 5dfa6c49de
@@ -21,12 +21,8 @@ choice ESP_DEFAULT_CPU_FREQ_MHZ
depends on !SECURE_FLASH_ENC_ENABLED depends on !SECURE_FLASH_ENC_ENABLED
bool "240 MHz" bool "240 MHz"
help help
When 240MHz is selected, esp_flash_write_encrypted() will automatically limit CPU frequency during Due to known silicon issue, CPU frequency will be fixed to 160 MHz when flash encryption is enabled. Please
execution: refer to the ESP32-C5 SoC Errata document for more details.
- v1.2 and above chips: limited to 160MHz
- v1.0 and below chips: limited to 80MHz
When 160MHz or lower is selected, no frequency limiting occurs during encrypted writes. Please refer to
the ESP32-C5 SoC Errata document for more details.
endchoice endchoice
config ESP_DEFAULT_CPU_FREQ_MHZ config ESP_DEFAULT_CPU_FREQ_MHZ