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feat(esp_hw_support): support LP_Probe in debug probe driver & sig inversion
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@@ -1,10 +1,11 @@
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/*
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* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0 OR MIT
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*/
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#include "soc/gpio_sig_map.h"
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#include "soc/lp_gpio_sig_map.h"
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#include "soc/debug_probe_periph.h"
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const debug_probe_signal_conn_t debug_probe_periph_signals = {
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@@ -28,6 +29,26 @@ const debug_probe_signal_conn_t debug_probe_periph_signals = {
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[14] = HP_PROBE_TOP_OUT14_IDX,
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[15] = HP_PROBE_TOP_OUT15_IDX,
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}
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},
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[1] = {
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.out_sig = {
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[0] = LP_PROBE_TOP_OUT0_IDX,
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[1] = LP_PROBE_TOP_OUT1_IDX,
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[2] = LP_PROBE_TOP_OUT2_IDX,
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[3] = LP_PROBE_TOP_OUT3_IDX,
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[4] = LP_PROBE_TOP_OUT4_IDX,
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[5] = LP_PROBE_TOP_OUT5_IDX,
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[6] = LP_PROBE_TOP_OUT6_IDX,
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[7] = LP_PROBE_TOP_OUT7_IDX,
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[8] = LP_PROBE_TOP_OUT8_IDX,
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[9] = LP_PROBE_TOP_OUT9_IDX,
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[10] = LP_PROBE_TOP_OUT10_IDX,
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[11] = LP_PROBE_TOP_OUT11_IDX,
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[12] = LP_PROBE_TOP_OUT12_IDX,
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[13] = LP_PROBE_TOP_OUT13_IDX,
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[14] = LP_PROBE_TOP_OUT14_IDX,
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[15] = LP_PROBE_TOP_OUT15_IDX,
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}
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}
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}
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};
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@@ -745,7 +745,7 @@ config SOC_CLOCKOUT_SUPPORT_CHANNEL_DIVIDER
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config SOC_DEBUG_PROBE_NUM_UNIT
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int
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default 1
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default 2
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config SOC_DEBUG_PROBE_MAX_OUTPUT_WIDTH
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int
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0 OR MIT
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*/
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@@ -49,6 +49,23 @@ typedef enum {
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DEBUG_PROBE_TARGET_PVT = 30, // PVT
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} soc_debug_probe_target_t;
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/**
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* @brief LP probe target module (probe_a_top_sel 0..10)
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*/
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typedef enum {
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DEBUG_PROBE_TARGET_LP_PMU = 0, // LP PMU
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DEBUG_PROBE_TARGET_LP_TCM_RAM = 1, // LP TCM RAM
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DEBUG_PROBE_TARGET_LP_TCM_ROM = 2, // LP TCM ROM
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DEBUG_PROBE_TARGET_LP_CORE = 3, // LP Core
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DEBUG_PROBE_TARGET_LP_ADC = 4, // LP ADC
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DEBUG_PROBE_TARGET_LP_SPI = 5, // LP SPI
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DEBUG_PROBE_TARGET_LP_TOUCH = 6, // LP Touch
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DEBUG_PROBE_TARGET_LP_ANA_PERI = 7, // LP Analog Peripherals
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DEBUG_PROBE_TARGET_LP_AON_CLKRST = 8, // LP AON Clock/Reset
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DEBUG_PROBE_TARGET_LP_SYS_MISC = 9, // LP System Misc
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DEBUG_PROBE_TARGET_LP_SYS_PROBE_IN = 10, // LP System Probe In
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} soc_debug_probe_target_lp_t;
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#ifdef __cplusplus
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}
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#endif
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@@ -285,7 +285,7 @@
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#define SOC_GPIO_CLOCKOUT_CHANNEL_NUM (2)
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#define SOC_CLOCKOUT_SUPPORT_CHANNEL_DIVIDER (1)
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#define SOC_DEBUG_PROBE_NUM_UNIT (1U) // Number of debug probe units
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#define SOC_DEBUG_PROBE_NUM_UNIT (2U) // Unit 0: HP probe, Unit 1: LP probe
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#define SOC_DEBUG_PROBE_MAX_OUTPUT_WIDTH (16) // Maximum width of the debug probe output in each unit
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/*-------------------------- RTCIO CAPS --------------------------------------*/
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