openthread: add SPI support in Radio Co-Processor

This commit is contained in:
xieqinan
2022-11-16 16:59:57 +08:00
parent 6cac537791
commit 5a1578e692
20 changed files with 812 additions and 57 deletions

View File

@@ -21,27 +21,52 @@
{ \
.radio_mode = RADIO_MODE_NATIVE, \
}
#else
#define ESP_OPENTHREAD_DEFAULT_RADIO_CONFIG() \
{ \
.radio_mode = RADIO_MODE_UART_RCP, \
.radio_uart_config = { \
.port = 1, \
.uart_config = \
{ \
.baud_rate = 460800, \
.data_bits = UART_DATA_8_BITS, \
.parity = UART_PARITY_DISABLE, \
.stop_bits = UART_STOP_BITS_1, \
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \
.rx_flow_ctrl_thresh = 0, \
.source_clk = UART_SCLK_DEFAULT, \
}, \
.rx_pin = 4, \
.tx_pin = 5, \
}, \
#elif CONFIG_OPENTHREAD_RADIO_SPINEL_UART
#define ESP_OPENTHREAD_DEFAULT_RADIO_CONFIG() \
{ \
.radio_mode = RADIO_MODE_UART_RCP, \
.radio_uart_config = { \
.port = 1, \
.uart_config = \
{ \
.baud_rate = 460800, \
.data_bits = UART_DATA_8_BITS, \
.parity = UART_PARITY_DISABLE, \
.stop_bits = UART_STOP_BITS_1, \
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \
.rx_flow_ctrl_thresh = 0, \
.source_clk = UART_SCLK_DEFAULT, \
}, \
.rx_pin = 4, \
.tx_pin = 5, \
}, \
}
#endif
#else
#define ESP_OPENTHREAD_DEFAULT_RADIO_CONFIG() \
{ \
.radio_mode = RADIO_MODE_SPI_RCP, \
.radio_spi_config = { \
.host_device = SPI2_HOST, \
.dma_channel = 2, \
.spi_interface = \
{ \
.mosi_io_num = 11, \
.sclk_io_num = 12, \
.miso_io_num = 13, \
}, \
.spi_device = \
{ \
.cs_ena_pretrans = 2, \
.input_delay_ns = 100, \
.mode = 0, \
.clock_speed_hz = 2500 * 1000, \
.spics_io_num = 10, \
.queue_size = 5, \
}, \
.intr_pin = 8, \
}, \
}
#endif // CONFIG_OPENTHREAD_RADIO_SPINEL_UART OR CONFIG_OPENTHREAD_RADIO_SPINEL_SPI
#if CONFIG_IDF_TARGET_ESP32C2 && CONFIG_XTAL_FREQ_26
#define HOST_BAUD_RATE 74880

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@@ -20,6 +20,7 @@
.radio_mode = RADIO_MODE_NATIVE, \
}
#if CONFIG_OPENTHREAD_RCP_UART
#if CONFIG_OPENTHREAD_UART_PIN_MANUAL
#define OPENTHREAD_RCP_UART_RX_PIN CONFIG_OPENTHREAD_UART_RX_PIN
#define OPENTHREAD_RCP_UART_TX_PIN CONFIG_OPENTHREAD_UART_TX_PIN
@@ -47,6 +48,30 @@
.tx_pin = OPENTHREAD_RCP_UART_TX_PIN, \
}, \
}
#else // CONFIG_OPENTHREAD_RCP_SPI
#define ESP_OPENTHREAD_DEFAULT_HOST_CONFIG() \
{ \
.host_connection_mode = HOST_CONNECTION_MODE_RCP_SPI, \
.spi_slave_config = { \
.host_device = SPI2_HOST, \
.bus_config = { \
.mosi_io_num = 3, \
.miso_io_num = 1, \
.sclk_io_num = 0, \
.quadhd_io_num = -1, \
.quadwp_io_num = -1, \
.isr_cpu_id = INTR_CPU_ID_0, \
}, \
.slave_config = { \
.mode = 0, \
.spics_io_num = 2, \
.queue_size = 3, \
.flags = 0, \
}, \
.intr_pin = 9, \
}, \
}
#endif
#define ESP_OPENTHREAD_DEFAULT_PORT_CONFIG() \
{ \

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@@ -10,7 +10,7 @@
* Unless required by applicable law or agreed to in writing, this
* software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, either express or implied.
*/
*/
#include <stdio.h>
#include <unistd.h>
@@ -64,5 +64,5 @@ void app_main(void)
ESP_ERROR_CHECK(nvs_flash_init());
ESP_ERROR_CHECK(esp_event_loop_create_default());
ESP_ERROR_CHECK(esp_vfs_eventfd_register(&eventfd_config));
xTaskCreate(ot_task_worker, "ot_rcp_main", 10240, xTaskGetCurrentTaskHandle(), 5, NULL);
xTaskCreate(ot_task_worker, "ot_rcp_main", 3072, xTaskGetCurrentTaskHandle(), 5, NULL);
}