diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
index bebfa8956f3..20b1c2025c8 100644
--- a/components/esp_hw_support/sleep_modes.c
+++ b/components/esp_hw_support/sleep_modes.c
@@ -495,12 +495,13 @@ static void s_do_deep_sleep_phy_callback(void)
 #endif
 
 static int s_cache_suspend_cnt = 0;
+static uint32_t s_cache_state = 0;
 
 // Must be called from critical sections.
 static void IRAM_ATTR suspend_cache(void) {
     s_cache_suspend_cnt++;
     if (s_cache_suspend_cnt == 1) {
-        spi_flash_disable_cache(esp_cpu_get_core_id(), NULL);
+        spi_flash_disable_cache(esp_cpu_get_core_id(), &s_cache_state);
     }
 }
 
@@ -509,7 +510,7 @@ static void IRAM_ATTR resume_cache(void) {
     s_cache_suspend_cnt--;
     assert(s_cache_suspend_cnt >= 0 && DRAM_STR("cache resume doesn't match suspend ops"));
     if (s_cache_suspend_cnt == 0) {
-        spi_flash_restore_cache(esp_cpu_get_core_id(), 0);
+        spi_flash_restore_cache(esp_cpu_get_core_id(), s_cache_state);
     }
 }
 
diff --git a/components/esp_pm/test_apps/esp_pm/sdkconfig.ci.slp_iram_opt b/components/esp_pm/test_apps/esp_pm/sdkconfig.ci.slp_iram_opt
index ebffd40c4b4..d41587bdeca 100644
--- a/components/esp_pm/test_apps/esp_pm/sdkconfig.ci.slp_iram_opt
+++ b/components/esp_pm/test_apps/esp_pm/sdkconfig.ci.slp_iram_opt
@@ -2,3 +2,4 @@ CONFIG_PM_SLP_IRAM_OPT=y
 CONFIG_PM_RTOS_IDLE_OPT=y
 CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y
 CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION=y
+CONFIG_SPI_FLASH_ROM_IMPL=y
diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld
index b0d9ee5e128..7fcd85a18fd 100644
--- a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld
+++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld
@@ -139,8 +139,8 @@ PROVIDE( spi_flash_check_and_flush_cache = 0x400001a4 );
 PROVIDE( spi_flash_mmap_get_free_pages = 0x400001a8 );
 PROVIDE( spi_flash_cache2phys = 0x400001ac );
 PROVIDE( spi_flash_phys2cache = 0x400001b0 );
-PROVIDE( spi_flash_disable_cache = 0x400001b4 );
-PROVIDE( spi_flash_restore_cache = 0x400001b8 );
+PROVIDE( rom_spi_flash_disable_cache = 0x400001b4 );
+PROVIDE( rom_spi_flash_restore_cache = 0x400001b8 );
 PROVIDE( spi_flash_cache_enabled = 0x400001bc );
 PROVIDE( spi_flash_enable_cache = 0x400001c0 );
 PROVIDE( spi_cache_mode_switch = 0x400001c4 );
diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld
index a301575edb4..3976b098983 100644
--- a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld
+++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld
@@ -144,8 +144,8 @@ PROVIDE( spi_flash_check_and_flush_cache = 0x400001b4 );
 PROVIDE( spi_flash_mmap_get_free_pages = 0x400001b8 );
 PROVIDE( spi_flash_cache2phys = 0x400001bc );
 PROVIDE( spi_flash_phys2cache = 0x400001c0 );
-PROVIDE( spi_flash_disable_cache = 0x400001c4 );
-PROVIDE( spi_flash_restore_cache = 0x400001c8 );
+PROVIDE( rom_spi_flash_disable_cache = 0x400001c4 );
+PROVIDE( rom_spi_flash_restore_cache = 0x400001c8 );
 PROVIDE( spi_flash_cache_enabled = 0x400001cc );
 PROVIDE( spi_flash_enable_cache = 0x400001d0 );
 PROVIDE( spi_cache_mode_switch = 0x400001d4 );
diff --git a/components/esp_rom/esp32c5/mp/esp32c5/ld/esp32c5.rom.spiflash.ld b/components/esp_rom/esp32c5/mp/esp32c5/ld/esp32c5.rom.spiflash.ld
index fdcba90d733..9cbe039eadc 100644
--- a/components/esp_rom/esp32c5/mp/esp32c5/ld/esp32c5.rom.spiflash.ld
+++ b/components/esp_rom/esp32c5/mp/esp32c5/ld/esp32c5.rom.spiflash.ld
@@ -18,8 +18,8 @@
  ***************************************/
 
 /* Functions */
-spi_flash_disable_cache = 0x40000204;
-spi_flash_restore_cache = 0x40000208;
+rom_spi_flash_disable_cache = 0x40000204;
+rom_spi_flash_restore_cache = 0x40000208;
 spi_flash_cache_enabled = 0x4000020c;
 spi_flash_enable_cache = 0x40000210;
 esp_enable_cache_flash_wrap = 0x40000214;
diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.spiflash.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.spiflash.ld
index 4954c044b79..aebbae567f6 100644
--- a/components/esp_rom/esp32c6/ld/esp32c6.rom.spiflash.ld
+++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.spiflash.ld
@@ -18,8 +18,8 @@
  ***************************************/
 
 /* Functions */
-spi_flash_disable_cache = 0x400001f0;
-spi_flash_restore_cache = 0x400001f4;
+rom_spi_flash_disable_cache = 0x400001f0;
+rom_spi_flash_restore_cache = 0x400001f4;
 spi_flash_cache_enabled = 0x400001f8;
 esp_enable_cache_flash_wrap = 0x40000200;
 
diff --git a/components/esp_rom/esp32c61/ld/esp32c61.rom.spiflash.ld b/components/esp_rom/esp32c61/ld/esp32c61.rom.spiflash.ld
index ed3450cde9a..5d2695eb546 100644
--- a/components/esp_rom/esp32c61/ld/esp32c61.rom.spiflash.ld
+++ b/components/esp_rom/esp32c61/ld/esp32c61.rom.spiflash.ld
@@ -18,8 +18,8 @@
  ***************************************/
 
 /* Functions */
-spi_flash_disable_cache = 0x40000204;
-spi_flash_restore_cache = 0x40000208;
+rom_spi_flash_disable_cache = 0x40000204;
+rom_spi_flash_restore_cache = 0x40000208;
 spi_flash_cache_enabled = 0x4000020c;
 spi_flash_enable_cache = 0x40000210;
 esp_enable_cache_flash_wrap = 0x40000214;
diff --git a/components/esp_rom/esp32h2/ld/esp32h2.rom.spiflash.ld b/components/esp_rom/esp32h2/ld/esp32h2.rom.spiflash.ld
index 94481c09cd5..8b37078b6e1 100644
--- a/components/esp_rom/esp32h2/ld/esp32h2.rom.spiflash.ld
+++ b/components/esp_rom/esp32h2/ld/esp32h2.rom.spiflash.ld
@@ -18,8 +18,8 @@
  ***************************************/
 
 /* Functions */
-spi_flash_disable_cache = 0x400001e8;
-spi_flash_restore_cache = 0x400001ec;
+rom_spi_flash_disable_cache = 0x400001e8;
+rom_spi_flash_restore_cache = 0x400001ec;
 spi_flash_cache_enabled = 0x400001f0;
 esp_enable_cache_flash_wrap = 0x400001f8;
 
diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld
index e544cbe987f..a44166f2802 100644
--- a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld
+++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld
@@ -196,8 +196,8 @@ PROVIDE( spi_flash_check_and_flush_cache = 0x40000bdc );
 PROVIDE( spi_flash_mmap_get_free_pages = 0x40000be8 );
 PROVIDE( spi_flash_cache2phys = 0x40000bf4 );
 PROVIDE( spi_flash_phys2cache = 0x40000c00 );
-PROVIDE( spi_flash_disable_cache = 0x40000c0c );
-PROVIDE( spi_flash_restore_cache = 0x40000c18 );
+PROVIDE( rom_spi_flash_disable_cache = 0x40000c0c );
+PROVIDE( rom_spi_flash_restore_cache = 0x40000c18 );
 PROVIDE( spi_flash_cache_enabled = 0x40000c24 );
 PROVIDE( spi_flash_enable_cache = 0x40000c30 );
 PROVIDE( spi_cache_mode_switch = 0x40000c3c );
diff --git a/components/esp_rom/patches/esp_rom_spiflash.c b/components/esp_rom/patches/esp_rom_spiflash.c
index d7a13f32c02..133d66e7507 100644
--- a/components/esp_rom/patches/esp_rom_spiflash.c
+++ b/components/esp_rom/patches/esp_rom_spiflash.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,6 +19,10 @@
 #include "esp32p4/rom/opi_flash.h"
 #endif
 
+#if SOC_BRANCH_PREDICTOR_SUPPORTED
+#include "riscv/rv_utils.h"
+#endif
+
 #define SPI_IDX   1
 
 #if CONFIG_IDF_TARGET_ESP32
@@ -765,3 +769,24 @@ void esp_rom_opiflash_cache_mode_config(esp_rom_spiflash_read_mode_t mode, const
 #endif // IDF_TARGET
 
 #endif // CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
+
+#if CONFIG_SPI_FLASH_ROM_IMPL
+extern void rom_spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_state);
+void spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_state)
+{
+#if SOC_BRANCH_PREDICTOR_SUPPORTED
+    //branch predictor will start cache request as well
+    rv_utils_dis_branch_predictor();
+#endif
+    rom_spi_flash_disable_cache(cpuid, saved_state);
+}
+
+extern void rom_spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_state);
+void spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_state)
+{
+    rom_spi_flash_restore_cache(cpuid, saved_state);
+#if SOC_BRANCH_PREDICTOR_SUPPORTED
+    rv_utils_en_branch_predictor();
+#endif
+}
+#endif
diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c
index f4f1c9c9f31..4e087a815b5 100644
--- a/components/spi_flash/cache_utils.c
+++ b/components/spi_flash/cache_utils.c
@@ -362,6 +362,7 @@ void IRAM_ATTR spi_flash_enable_cache(uint32_t cpuid)
 #endif
 }
 
+#if !CONFIG_SPI_FLASH_ROM_IMPL
 void IRAM_ATTR spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_state)
 {
 #if SOC_BRANCH_PREDICTOR_SUPPORTED
@@ -383,6 +384,7 @@ bool IRAM_ATTR spi_flash_cache_enabled(void)
 {
     return cache_hal_is_cache_enabled(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
 }
+#endif
 
 #if CONFIG_IDF_TARGET_ESP32S2
 IRAM_ATTR void esp_config_instruction_cache_mode(void)