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Merge branch 'fix/32mb_120m_v5.5' into 'release/v5.5'

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fix(spi_flash): 1. Fix flash 120m in qio mode failed on esp32p4 (with 32M map enabled) 2. Add C61 32M flash support (backport v5.5)

See merge request espressif/esp-idf!46044
This commit is contained in:
morris
2026-04-20 13:30:14 +08:00
parent 5b710c3b21 a033efcb3d
commit 5736a2d132
18 changed files with 228 additions and 21 deletions
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components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
-4
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@@ -1243,10 +1243,6 @@ config SOC_SPI_MEM_SUPPORT_WRAP
bool
default y
config SOC_SPI_MEM_SUPPORT_WB_MODE_INDEPENDENT_CONTROL
bool
default y
config SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP
bool
default y
components/soc/esp32c5/include/soc/soc_caps.h
-1
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@@ -480,7 +480,6 @@
#define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1)
#define SOC_SPI_MEM_SUPPORT_CHECK_SUS (1)
#define SOC_SPI_MEM_SUPPORT_WRAP (1)
#define SOC_SPI_MEM_SUPPORT_WB_MODE_INDEPENDENT_CONTROL (1)
#define SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP (1)
#define SOC_SPI_MEM_SUPPORT_TIMING_TUNING (1)
#define SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR (1)
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+4
View File
@@ -871,6 +871,10 @@ config SOC_SPI_MEM_FLASH_SUPPORT_HPM
bool
default y
config SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP
bool
default y
config SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY
bool
default y
components/soc/esp32c61/include/soc/soc_caps.h
+1
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@@ -351,6 +351,7 @@
#define SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR (1)
#define SOC_SPI_MEM_PSRAM_FREQ_AXI_CONSTRAINED (1)
#define SOC_SPI_MEM_FLASH_SUPPORT_HPM (1) /*!< Support High Performance Mode */
#define SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP (1)
#define SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY (1)
#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT 16 /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */