Merge branch 'bugfix/use_xtal_for_c3_wdt' into 'master'

fix(wdt): changed ESP32-C3 WDT to use XTAL as clock

Closes IDF-6729

See merge request espressif/esp-idf!25867

components/soc/esp32c2/include/soc/Kconfig.soc_caps.in

@@ -539,6 +539,10 @@ config SOC_TIMER_GROUP_TOTAL_TIMERS
     int
     default 1
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_EFUSE_DIS_DOWNLOAD_ICACHE
     bool
     default y

components/soc/esp32c2/include/soc/soc_caps.h

@@ -256,6 +256,9 @@
 #define SOC_TIMER_GROUP_SUPPORT_XTAL      (1)
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (1U)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- eFuse CAPS----------------------------*/
 #define SOC_EFUSE_DIS_DOWNLOAD_ICACHE 1
 #define SOC_EFUSE_DIS_PAD_JTAG 1

components/soc/esp32c3/include/soc/Kconfig.soc_caps.in

@@ -763,6 +763,10 @@ config SOC_TIMER_GROUP_TOTAL_TIMERS
     int
     default 2
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 1

components/soc/esp32c3/include/soc/clk_tree_defs.h

@@ -335,7 +335,7 @@ typedef enum {
 typedef enum {
     MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     MWDT_CLK_SRC_APB = SOC_MOD_CLK_APB,             /*!< Select APB as the source clock */
-    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,         /*!< Select APB as the default clock choice */
+    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,         /*!< Select APB as the default clock choice */
 } soc_periph_mwdt_clk_src_t;
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////

components/soc/esp32c3/include/soc/soc_caps.h

@@ -339,6 +339,9 @@
 #define SOC_TIMER_GROUP_SUPPORT_APB       (1)
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         1UL
 #define SOC_TWAI_CLK_SUPPORT_APB        1

components/soc/esp32c6/include/soc/Kconfig.soc_caps.in

@@ -1007,6 +1007,10 @@ config SOC_TIMER_SUPPORT_ETM
     bool
     default y
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 2

components/soc/esp32c6/include/soc/clk_tree_defs.h

@@ -425,7 +425,7 @@ typedef enum {
     MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     MWDT_CLK_SRC_PLL_F80M = SOC_MOD_CLK_PLL_F80M,   /*!< Select PLL fixed 80 MHz as the source clock */
     MWDT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST,     /*!< Select RTC fast as the source clock */
-    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F80M,    /*!< Select PLL fixed 80 MHz as the default clock choice */
+    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,        /*!< Select PLL fixed 80 MHz as the default clock choice */
 } soc_periph_mwdt_clk_src_t;
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////

components/soc/esp32c6/include/soc/soc_caps.h

@@ -418,6 +418,9 @@
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 #define SOC_TIMER_SUPPORT_ETM             (1)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         2
 #define SOC_TWAI_CLK_SUPPORT_XTAL       1

components/soc/esp32h2/include/soc/Kconfig.soc_caps.in

@@ -991,6 +991,10 @@ config SOC_TIMER_SUPPORT_ETM
     bool
     default y
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 1

components/soc/esp32h2/include/soc/clk_tree_defs.h

@@ -424,7 +424,7 @@ typedef enum {
     MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     MWDT_CLK_SRC_PLL_F48M = SOC_MOD_CLK_PLL_F48M,   /*!< Select PLL fixed 48 MHz as the source clock */
     MWDT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST,     /*!< Select RTC fast as the source clock */
-    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F48M,    /*!< Select PLL as the default clock choice */
+    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,        /*!< Select PLL as the default clock choice */
 } soc_periph_mwdt_clk_src_t;
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////

components/soc/esp32h2/include/soc/soc_caps.h

@@ -412,6 +412,9 @@
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 #define SOC_TIMER_SUPPORT_ETM             (1)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         1UL
 #define SOC_TWAI_CLK_SUPPORT_XTAL       1

components/soc/esp32p4/include/soc/Kconfig.soc_caps.in

@@ -855,6 +855,10 @@ config SOC_TIMER_SUPPORT_ETM
     bool
     default y
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 2

components/soc/esp32p4/include/soc/soc_caps.h

@@ -420,6 +420,9 @@
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      4
 #define SOC_TIMER_SUPPORT_ETM             1
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         2
 #define SOC_TWAI_CLK_SUPPORT_XTAL       1