Merge branch 'fix/harden_esp_security_v6.1' into 'release/v6.1'

fix(esp_security): harden crypto peripheral error handling (v6.1)

See merge request espressif/esp-idf!50324
This commit is contained in:
Mahavir Jain
2026-07-10 09:39:59 +05:30
4 changed files with 41 additions and 12 deletions

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -11,7 +11,10 @@
static inline void esp_crypto_dpa_set_level(esp_crypto_dpa_sec_level_t level)
{
assert(level >= ESP_CRYPTO_DPA_SEC_LEVEL_LOW && level <= ESP_CRYPTO_DPA_SEC_LEVEL_HIGH);
if (level < ESP_CRYPTO_DPA_SEC_LEVEL_OFF || level > ESP_CRYPTO_DPA_SEC_LEVEL_HIGH) {
// Out of range, clamp to highest level
level = ESP_CRYPTO_DPA_SEC_LEVEL_HIGH;
}
REG_SET_BIT(HP_SYSTEM_SEC_DPA_CONF_REG, HP_SYSTEM_SEC_DPA_CFG_SEL);
REG_SET_FIELD(HP_SYSTEM_SEC_DPA_CONF_REG, HP_SYSTEM_SEC_DPA_LEVEL, level);
}

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@@ -42,6 +42,9 @@
#include "hal/key_mgr_hal.h"
#include "hal/key_mgr_ll.h"
#endif
#include "esp_log.h"
#define TAG "esp_ds"
/**
* The vtask delay \c esp_ds_sign() is using while waiting for completion of the signing operation.
@@ -346,8 +349,9 @@ esp_err_t esp_ds_start_sign(const void *message,
#if SOC_KEY_MANAGER_DS_KEY_DEPLOY
if (key_id == HMAC_KEY_KM) {
if (!key_mgr_ll_is_supported()) {
ESP_LOGE(TAG, "HMAC_KEY_KM requested but Key Manager peripheral is not supported on this chip");
ds_disable_release();
assert(false && "Key manager is not supported");
return ESP_ERR_NOT_SUPPORTED;
}
key_mgr_hal_set_key_usage(ESP_KEY_MGR_DS_KEY, ESP_KEY_MGR_USE_OWN_KEY);
ds_hal_set_key_source(DS_KEY_SOURCE_KEY_MGR);
@@ -407,6 +411,14 @@ bool esp_ds_is_busy(void)
return ds_hal_busy();
}
static void esp_ds_zeroize(void *buf, size_t len)
{
volatile uint8_t *p = (volatile uint8_t *)buf;
for (size_t i = 0; i < len; i++) {
*p++ = 0;
}
}
esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx)
{
if (!signature || !esp_ds_ctx) {
@@ -423,10 +435,12 @@ esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx)
esp_err_t return_value = ESP_OK;
if (sig_check_result == DS_SIGNATURE_MD_FAIL || sig_check_result == DS_SIGNATURE_PADDING_AND_MD_FAIL) {
esp_ds_zeroize(signature, rsa_len);
return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST;
}
if (sig_check_result == DS_SIGNATURE_PADDING_FAIL) {
esp_ds_zeroize(signature, rsa_len);
return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING;
}

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@@ -91,6 +91,14 @@ esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
uint32_t conf_error = hmac_hal_configure(HMAC_OUTPUT_USER, key_id);
if (conf_error) {
esp_crypto_sha_enable_periph_clk(false);
esp_crypto_hmac_enable_periph_clk(false);
#if SOC_DIG_SIGN_SUPPORTED
esp_crypto_ds_enable_periph_clk(false);
#endif // SOC_DIG_SIGN_SUPPORTED
#if SOC_KEY_MANAGER_HMAC_KEY_DEPLOY
esp_crypto_key_mgr_enable_periph_clk(false);
#endif // SOC_KEY_MANAGER_HMAC_KEY_DEPLOY
esp_crypto_hmac_lock_release();
return ESP_FAIL;
}
@@ -99,7 +107,7 @@ esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
// If message including padding is only one block...
// Last message block, so apply SHA-256 padding rules in software
uint8_t block[SHA256_BLOCK_SZ];
uint64_t bit_len = __builtin_bswap64(message_len * 8 + 512);
uint64_t bit_len = __builtin_bswap64((uint64_t)message_len * 8 + 512);
write_and_padd(block, message_bytes, message_len);
// Final block: append the bit length in this block and signal padding to peripheral
@@ -126,7 +134,7 @@ esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
size_t remaining = message_len % SHA256_BLOCK_SZ;
// Last message block, so apply SHA-256 padding rules in software
uint8_t block[SHA256_BLOCK_SZ];
uint64_t bit_len = __builtin_bswap64(message_len * 8 + 512);
uint64_t bit_len = __builtin_bswap64((uint64_t)message_len * 8 + 512);
// If the remaining message and appended padding doesn't fit into a single block, we have to write an
// extra block with the rest of the message and potential padding first.
@@ -185,6 +193,8 @@ esp_err_t esp_hmac_jtag_enable(hmac_key_id_t key_id, const uint8_t *token)
}
esp_crypto_hmac_lock_acquire();
esp_crypto_hmac_enable_periph_clk(true);
esp_crypto_sha_enable_periph_clk(true);
ets_status = ets_jtag_enable_temporarily(token, convert_key_type(key_id));
@@ -196,8 +206,8 @@ esp_err_t esp_hmac_jtag_enable(hmac_key_id_t key_id, const uint8_t *token)
ESP_LOGD(TAG, "HMAC computation in downstream mode is completed.");
esp_crypto_sha_enable_periph_clk(false);
esp_crypto_hmac_enable_periph_clk(false);
esp_crypto_hmac_lock_release();
return err;

View File

@@ -539,12 +539,6 @@ static esp_err_t key_mgr_recover_key(key_recovery_config_t *config)
key_mgr_hal_set_xts_aes_key_len(key_type, key_len);
}
key_mgr_hal_set_key_purpose(config->key_purpose);
key_mgr_hal_start();
key_mgr_wait_for_state(ESP_KEY_MGR_STATE_LOAD);
uint8_t key_recovery_info_index = config->multi_stage_deployment ? 1 : 0;
if (!check_key_info_validity(&config->key_recovery_info->key_info[key_recovery_info_index])) {
@@ -552,6 +546,12 @@ static esp_err_t key_mgr_recover_key(key_recovery_config_t *config)
return ESP_FAIL;
}
key_mgr_hal_set_key_purpose(config->key_purpose);
key_mgr_hal_start();
key_mgr_wait_for_state(ESP_KEY_MGR_STATE_LOAD);
key_mgr_hal_write_assist_info(config->key_recovery_info->key_info[key_recovery_info_index].info, KEY_MGR_KEY_RECOVERY_INFO_SIZE);
key_mgr_hal_continue();
key_mgr_wait_for_state(ESP_KEY_MGR_STATE_GAIN);
@@ -562,6 +562,8 @@ static esp_err_t key_mgr_recover_key(key_recovery_config_t *config)
if (!multi_stage_deployment_key_purpose(config->key_purpose)) {
if (!key_mgr_hal_is_key_deployment_valid(key_type, key_len)) {
ESP_LOGD(TAG, "Key deployment is not valid");
key_mgr_hal_continue();
key_mgr_wait_for_state(ESP_KEY_MGR_STATE_IDLE);
return ESP_FAIL;
}
}