Fix output bit range in bitscrambler documentation

Destination bit range incorrect in `Sub-instructions` example
2026-10-01 18:50:34 +03:00 · 2026-04-17 17:20:28 +08:00
parent dfc5bbb58c
commit 51d059232b
20 changed files with 188 additions and 61 deletions
@@ -94,6 +94,7 @@ void esp_clk_tree_initialize(void)
    }

    // Gating
+    // flash clock source is set to BBPLL in bootloader
 }

 bool esp_clk_tree_enable_power(soc_root_clk_circuit_t clk_circuit, bool enable)