driver: Minor update for esp32c6

Leave TODO for esp_adc and legacy adc driver
HAL/SOC update for spi and i2s

components/soc/esp32c6/include/soc/Kconfig.soc_caps.in

@@ -183,10 +183,6 @@ config SOC_CPU_HAS_FLEXIBLE_INTC
     bool
     default y
 
-config SOC_RV32A_SUPPORTED
-    bool
-    default y
-
 config SOC_INT_PLIC_SUPPORTED
     bool
     default y
@@ -495,6 +491,10 @@ config SOC_SPI_PERIPH_NUM
     int
     default 2
 
+config SOC_SPI_MAX_CS_NUM
+    int
+    default 6
+
 config SOC_SPI_MAXIMUM_BUFFER_SIZE
     int
     default 64

components/soc/esp32c6/include/soc/clk_tree_defs.h

@@ -5,6 +5,8 @@
  */
 #pragma once
 
+#include "sdkconfig.h" // TODO: IDF-5973
+
 #ifdef __cplusplus
 extern "C" {
 #endif

components/soc/esp32c6/include/soc/soc_caps.h

@@ -112,7 +112,6 @@
 #define SOC_CPU_CORES_NUM               (1U)
 #define SOC_CPU_INTR_NUM                32
 #define SOC_CPU_HAS_FLEXIBLE_INTC       1
-#define SOC_RV32A_SUPPORTED             1
 #define SOC_INT_PLIC_SUPPORTED          1       //riscv platform-level interrupt controller
 
 #define SOC_CPU_BREAKPOINTS_NUM         4
@@ -276,6 +275,7 @@
 /*-------------------------- SPI CAPS ----------------------------------------*/
 #define SOC_SPI_PERIPH_NUM          2
 #define SOC_SPI_PERIPH_CS_NUM(i)    6
+#define SOC_SPI_MAX_CS_NUM          6
 
 #define SOC_SPI_MAXIMUM_BUFFER_SIZE     64
 

components/soc/esp32c6/spi_periph.c

@@ -36,7 +36,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
         .spiq_in = FSPIQ_IN_IDX,
         .spiwp_in = FSPIWP_IN_IDX,
         .spihd_in = FSPIHD_IN_IDX,
-        .spics_out = {FSPICS0_OUT_IDX},
+        .spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
         .spics_in = FSPICS0_IN_IDX,
         .spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK,
         .spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,