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fix(esp_hw_support): fix ESP32-S31 CPU/DFS clk_tree refcount and keep clock source during DFS
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@@ -122,6 +122,24 @@ FORCE_INLINE_ATTR void pmu_ll_hp_set_clk_power(pmu_dev_t *hw, pmu_hp_mode_t mode
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hw->hp_sys[mode].clk_power.val = xpd_flag;
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}
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/**
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* @brief Set the power and isolation of the analog i2c master shared by all the PLLs
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*
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* @param hw Beginning address of the peripheral registers.
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* @param mode The pmu mode
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* @param xpd_bb_i2c Power up the analog i2c master
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* @param iso_en Isolate the analog i2c master interface
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* @param retention Retain the analog i2c master registers
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*
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* @return None
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*/
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FORCE_INLINE_ATTR void pmu_ll_hp_set_ana_i2c_power(pmu_dev_t *hw, pmu_hp_mode_t mode, bool xpd_bb_i2c, bool iso_en, bool retention)
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{
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hw->hp_sys[mode].clk_power.xpd_bb_i2c = xpd_bb_i2c;
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hw->hp_sys[mode].clk_power.i2c_iso_en = iso_en;
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hw->hp_sys[mode].clk_power.i2c_retention = retention;
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}
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FORCE_INLINE_ATTR void pmu_ll_hp_set_xtal_xpd(pmu_dev_t *hw, pmu_hp_mode_t mode, bool xpd_xtal)
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{
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hw->hp_sys[mode].xtal.xpd_xtal = xpd_xtal;
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