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Merge branch 'fix/lp_periph_init_fail_with_cpp_v5.5' into 'release/v5.5'

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fix(ulp): make LP peripheral default config macros C++ compatible (v5.5)

See merge request espressif/esp-idf!50212
This commit is contained in:
Marius Vikhammer
2026-07-20 13:54:23 +08:00
parent 762615330d a9ea3ff796
commit 4fce6e8ddb
7 changed files with 198 additions and 4 deletions
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components/ulp/lp_core/include/lp_core_i2c.h
+36
View File
@@ -56,6 +56,41 @@ typedef struct {
#endif
/* Default LP I2C GPIO settings */
#ifdef __cplusplus
#define LP_I2C_DEFAULT_GPIO_CONFIG() (__extension__({ \
lp_core_i2c_pin_cfg_t __lp_i2c_pin_cfg; \
__lp_i2c_pin_cfg.sda_io_num = LP_I2C_SDA_IO; \
__lp_i2c_pin_cfg.scl_io_num = LP_I2C_SCL_IO; \
__lp_i2c_pin_cfg.sda_pullup_en = true; \
__lp_i2c_pin_cfg.scl_pullup_en = true; \
__lp_i2c_pin_cfg; \
}))
/* LP I2C fast mode config. Max SCL freq of 400 KHz. */
#define LP_I2C_FAST_MODE_CONFIG() (__extension__({ \
lp_core_i2c_timing_cfg_t __lp_i2c_timing_cfg; \
__lp_i2c_timing_cfg.clk_speed_hz = 400000; \
__lp_i2c_timing_cfg; \
}))
/* LP I2C standard mode config. Max SCL freq of 100 KHz. */
#define LP_I2C_STANDARD_MODE_CONFIG() (__extension__({ \
lp_core_i2c_timing_cfg_t __lp_i2c_timing_cfg; \
__lp_i2c_timing_cfg.clk_speed_hz = 100000; \
__lp_i2c_timing_cfg; \
}))
#define LP_I2C_DEFAULT_SRC_CLK() LP_I2C_SCLK_LP_FAST
/* Default LP I2C GPIO settings and timing parameters */
#define LP_CORE_I2C_DEFAULT_CONFIG() (__extension__({ \
lp_core_i2c_cfg_t __lp_i2c_cfg; \
__lp_i2c_cfg.i2c_pin_cfg = LP_I2C_DEFAULT_GPIO_CONFIG(); \
__lp_i2c_cfg.i2c_timing_cfg = LP_I2C_FAST_MODE_CONFIG(); \
__lp_i2c_cfg.i2c_src_clk = LP_I2C_DEFAULT_SRC_CLK(); \
__lp_i2c_cfg; \
}))
#else
#define LP_I2C_DEFAULT_GPIO_CONFIG() \
.i2c_pin_cfg.sda_io_num = LP_I2C_SDA_IO,\
.i2c_pin_cfg.scl_io_num = LP_I2C_SCL_IO,\
@@ -80,6 +115,7 @@ typedef struct {
LP_I2C_FAST_MODE_CONFIG() \
LP_I2C_DEFAULT_SRC_CLK() \
}
#endif /* __cplusplus */
/**
* @brief Initialize and configure the LP I2C for use by the LP core
components/ulp/lp_core/include/lp_core_uart.h
+37 -2
View File
@@ -21,8 +21,8 @@ extern "C" {
#if CONFIG_IDF_TARGET_ESP32P4
#define LP_UART_DEFAULT_TX_GPIO_NUM GPIO_NUM_14
#define LP_UART_DEFAULT_RX_GPIO_NUM GPIO_NUM_15
#define LP_UART_DEFAULT_RTS_GPIO_NUM (-1)
#define LP_UART_DEFAULT_CTS_GPIO_NUM (-1)
#define LP_UART_DEFAULT_RTS_GPIO_NUM ((gpio_num_t)(-1))
#define LP_UART_DEFAULT_CTS_GPIO_NUM ((gpio_num_t)(-1))
#elif (CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C5)
#define LP_UART_DEFAULT_TX_GPIO_NUM GPIO_NUM_5
#define LP_UART_DEFAULT_RX_GPIO_NUM GPIO_NUM_4
@@ -64,6 +64,40 @@ typedef struct {
} lp_core_uart_cfg_t;
/* Default LP UART GPIO settings */
#ifdef __cplusplus
#define LP_UART_DEFAULT_GPIO_CONFIG() (__extension__({ \
lp_core_uart_pin_cfg_t __lp_uart_pin_cfg; \
__lp_uart_pin_cfg.tx_io_num = LP_UART_DEFAULT_TX_GPIO_NUM; \
__lp_uart_pin_cfg.rx_io_num = LP_UART_DEFAULT_RX_GPIO_NUM; \
__lp_uart_pin_cfg.rts_io_num = LP_UART_DEFAULT_RTS_GPIO_NUM; \
__lp_uart_pin_cfg.cts_io_num = LP_UART_DEFAULT_CTS_GPIO_NUM; \
__lp_uart_pin_cfg; \
}))
/* Default LP UART protocol config */
#define LP_UART_DEFAULT_PROTO_CONFIG() (__extension__({ \
lp_core_uart_proto_cfg_t __lp_uart_proto_cfg; \
__lp_uart_proto_cfg.baud_rate = 115200; \
__lp_uart_proto_cfg.data_bits = UART_DATA_8_BITS; \
__lp_uart_proto_cfg.parity = UART_PARITY_DISABLE; \
__lp_uart_proto_cfg.stop_bits = UART_STOP_BITS_1; \
__lp_uart_proto_cfg.flow_ctrl = UART_HW_FLOWCTRL_DISABLE; \
__lp_uart_proto_cfg.rx_flow_ctrl_thresh = 0; \
__lp_uart_proto_cfg; \
}))
/* Default LP UART source clock config */
#define LP_UART_DEFAULT_CLOCK_CONFIG() LP_UART_SCLK_DEFAULT
/* Default LP UART GPIO settings and protocol parameters */
#define LP_CORE_UART_DEFAULT_CONFIG() (__extension__({ \
lp_core_uart_cfg_t __lp_uart_cfg; \
__lp_uart_cfg.uart_pin_cfg = LP_UART_DEFAULT_GPIO_CONFIG(); \
__lp_uart_cfg.uart_proto_cfg = LP_UART_DEFAULT_PROTO_CONFIG(); \
__lp_uart_cfg.lp_uart_source_clk = LP_UART_DEFAULT_CLOCK_CONFIG(); \
__lp_uart_cfg; \
}))
#else
#define LP_UART_DEFAULT_GPIO_CONFIG() \
.uart_pin_cfg.tx_io_num = LP_UART_DEFAULT_TX_GPIO_NUM, \
.uart_pin_cfg.rx_io_num = LP_UART_DEFAULT_RX_GPIO_NUM, \
@@ -90,6 +124,7 @@ typedef struct {
LP_UART_DEFAULT_PROTO_CONFIG() \
LP_UART_DEFAULT_CLOCK_CONFIG() \
}
#endif /* __cplusplus */
/**
* @brief Initialize and configure the LP UART to be used from the LP core