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Merge branch 'bugfix/uart_extra_current_consumption_in_sleep' into 'master'

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fix(uart): reduce current consumption in sleep mode

See merge request espressif/esp-idf!50416
This commit is contained in:
Song Ruo Jing
2026-08-07 19:07:26 +08:00
parent 1c183dc089 246357a45d
commit 4ecd3e2287
3 changed files with 23 additions and 15 deletions
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2
components/esp_driver_ledc/test_apps/ledc/main/test_ledc.cpp
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@@ -530,7 +530,7 @@ static void timer_frequency_test(ledc_channel_t channel, ledc_timer_bit_t timer_
} else if (clk_src_freq == 60 * 1000 * 1000) {
theoretical_freq = 8993;
}
frequency_set_get(speed_mode, timer, 9000, theoretical_freq, 80);
frequency_set_get(speed_mode, timer, 9000, theoretical_freq, 100);
#endif
// Pause and de-configure the timer so that it won't affect the following test cases

10
components/esp_driver_uart/src/uart.c
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@@ -920,8 +920,8 @@ esp_err_t _uart_set_pin6(uart_port_t uart_num, int tx_io_num, int rx_io_num, int
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
// In such case, IOs are going to switch to sleep configuration (isolate) when entering sleep for power saving reason
// But TX IO in isolate state could write garbled data to the other end
// Therefore, we should disable the switch of the TX pin to sleep configuration
gpio_sleep_sel_dis(tx_io_num);
// Therefore, we should enable internal pull-up of the TX pin in sleep configuration
gpio_sleep_set_pull_mode(tx_io_num, GPIO_PULLUP_ONLY);
#endif
if (tx_rx_same_io || !uart_try_set_iomux_pin(uart_num, tx_io_num, SOC_UART_PERIPH_SIGNAL_TX)) {
if (uart_num < SOC_UART_HP_NUM) {
@@ -942,8 +942,10 @@ esp_err_t _uart_set_pin6(uart_port_t uart_num, int tx_io_num, int rx_io_num, int
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
// In such case, IOs are going to switch to sleep configuration (isolate) when entering sleep for power saving reason
// But RX IO in isolate state could receive garbled data into FIFO, which is not desired
// Therefore, we should disable the switch of the RX pin to sleep configuration
gpio_sleep_sel_dis(rx_io_num);
// Therefore, we should enable internal pull-up of the RX pin in sleep configuration
// Meanwhile, RX pin may be used for wakeup, so configure RX pin as input
gpio_sleep_set_pull_mode(rx_io_num, GPIO_PULLUP_ONLY);
gpio_sleep_set_direction(rx_io_num, GPIO_MODE_INPUT);
#endif
if (tx_rx_same_io || !uart_try_set_iomux_pin(uart_num, rx_io_num, SOC_UART_PERIPH_SIGNAL_RX)) {
io_reserve_mask &= ~BIT64(rx_io_num); // input IO via GPIO matrix does not need to be reserved

26
components/esp_hw_support/sleep_gpio.c
View File

@@ -130,6 +130,21 @@ void esp_sleep_config_gpio_isolate(void)
}
}
#if CONFIG_ESP_CONSOLE_UART
#if CONFIG_ESP_CONSOLE_UART_CUSTOM
const gpio_num_t uart_tx_gpio = (CONFIG_ESP_CONSOLE_UART_TX_GPIO >= 0) ? CONFIG_ESP_CONSOLE_UART_TX_GPIO : U0TXD_GPIO_NUM;
const gpio_num_t uart_rx_gpio = (CONFIG_ESP_CONSOLE_UART_RX_GPIO >= 0) ? CONFIG_ESP_CONSOLE_UART_RX_GPIO : U0RXD_GPIO_NUM;
#else
const gpio_num_t uart_tx_gpio = U0TXD_GPIO_NUM;
const gpio_num_t uart_rx_gpio = U0RXD_GPIO_NUM;
#endif
// Pull up TX and RX lines to avoid garbled data during sleep
gpio_sleep_set_pull_mode(uart_tx_gpio, GPIO_PULLUP_ONLY);
gpio_sleep_set_pull_mode(uart_rx_gpio, GPIO_PULLUP_ONLY);
// TX pin can be isolated, but RX pin may be used for wakeup, so configure RX pin as input
gpio_sleep_set_direction(uart_rx_gpio, GPIO_MODE_INPUT);
#endif
#if CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU && !SOC_MSPI_HAS_INDEPENT_IOMUX
gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_CLK), GPIO_PULLUP_ONLY);
gpio_sleep_set_pull_mode(esp_mspi_get_io(ESP_MSPI_IO_Q), GPIO_PULLUP_ONLY);
@@ -157,16 +172,7 @@ void esp_sleep_enable_gpio_switch(bool enable)
ESP_EARLY_LOGI(TAG, "%s automatic switching of GPIO sleep configuration", enable ? "Enable" : "Disable");
uint64_t gpio_sleep_sel_dis_mask = 0;
#if CONFIG_ESP_CONSOLE_UART
#if CONFIG_ESP_CONSOLE_UART_CUSTOM
const gpio_num_t uart_tx_gpio = (CONFIG_ESP_CONSOLE_UART_TX_GPIO >= 0) ? CONFIG_ESP_CONSOLE_UART_TX_GPIO : U0TXD_GPIO_NUM;
const gpio_num_t uart_rx_gpio = (CONFIG_ESP_CONSOLE_UART_RX_GPIO >= 0) ? CONFIG_ESP_CONSOLE_UART_RX_GPIO : U0RXD_GPIO_NUM;
#else
const gpio_num_t uart_tx_gpio = U0TXD_GPIO_NUM;
const gpio_num_t uart_rx_gpio = U0RXD_GPIO_NUM;
#endif
gpio_sleep_sel_dis_mask |= BIT64(uart_tx_gpio) | BIT64(uart_rx_gpio);
#endif
/* If the PSRAM is disable in ESP32xx chips equipped with PSRAM, there will be a large current leakage. */
#if CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND && CONFIG_SPIRAM & !SOC_MSPI_HAS_INDEPENT_IOMUX
const gpio_num_t psram_cs_gpio = (gpio_num_t)esp_mspi_get_io(ESP_MSPI_IO_CS1);