Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-01 18:50:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'debug/idf-15875-fix' into 'master'

Browse Source 
fix(psram): suspend external cache during CPU freq switch on esp32p4

Closes IDF-15875

See merge request espressif/esp-idf!50947
This commit is contained in:
Michael (XIAO Xufeng)
2026-08-25 18:01:02 +08:00
parent a931315e50 4f35071d50
commit 4bf78f4fa6
6 changed files with 184 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_system/port/soc/esp32p4/clk.c
+18 -1
View File
@@ -27,6 +27,7 @@
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_clk.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/esp_cache_private.h"
#include "esp_rom_serial_output.h"
#include "esp_rom_sys.h"
@@ -50,6 +51,22 @@ void IRAM_ATTR esp_rtc_init(void)
#endif //SOC_PMU_SUPPORTED
}
/*
* Perform the CPU frequency switch with the external memory (PSRAM) cache
* suspended. The frequency switch stalls the HP_ROOT clock and toggles PLL /
* clock gating; when the switch code runs from PSRAM-XIP, a cache-coherency
* transient during the switch can corrupt the external .bss region. Suspending
* the external-memory cache for the duration of the switch keeps the CPU off
* the XIP path, isolating the two.
* Must be IRAM-resident because it runs while the external cache is suspended.
*/
static void IRAM_ATTR esp_clk_cpu_freq_set_config_isolated(const rtc_cpu_freq_config_t *config)
{
esp_cache_suspend_ext_mem_cache();
rtc_clk_cpu_freq_set_config(config);
esp_cache_resume_ext_mem_cache();
}
__attribute__((weak)) void esp_clk_init(void)
{
assert(rtc_clk_xtal_freq_get() == SOC_XTAL_FREQ_40M);
@@ -111,7 +128,7 @@ __attribute__((weak)) void esp_clk_init(void)
}
if (res) {
rtc_clk_cpu_freq_set_config(&new_config);
esp_clk_cpu_freq_set_config_isolated(&new_config);
}
// Re calculate the ccount to make time calculation correct.